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Integrated circuit design considerations for spacecraft VLSI implemented in standard CMOS processes.

机译:在标准CMOS工艺中实现的航天器VLSI的集成电路设计注意事项。

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In this dissertation I will examine issues concerning the use of custom Application Specific Integrated Circuits (ASIC)s, fabricated at commercial foundries, for use in spacecraft. I will examine this subject from the fabrication, device, circuit and system level.; I begin with an overview of integrated circuit fabrication and post processing technology used to physically alter the circuit and enhance its electrical performance. I examine the MOS transistor and its variant the Floating-Gate MOS transistor from a device perspective. I discuss a model, derived from the electrostatics of the MOS structure, that is continuous over the entire region of operation while maintaining a small set of physical parameters. Secondly, the operation of the Floating-Gate MOSFET, a device finding increasing usage in adaptive systems, will be presented. The model is then expanded to include the effects of exposure to ionizing radiation on MOSFETs.; From a circuit perspective, I will examine the issue of power and energy usage in a digital system. The current-mode design approach will be reviewed as an introduction to Current-Mode-Differential-Logic, a low energy logic family. I will discuss Floating-Gate-Logic, an application of floating-gate transistors to solve the low-power problem by adjusting device thresholds.; The second half of the dissertation will be focused on radiation effects in MOS devices. I begin by describing the, rather unpleasant, environment that spacecraft operate in. I continue with a discussion on two main effects of radiation exposure that engineers need to contend with, radiation induced latchup and total-dose exposure. I will provide results from different experiments designed to evaluate a commercial CMOS process's usability for a space application. Finally I describe an application that utilizes the negative effects of radiation on floating-gate MOS devices, an integrated, electronic micro-dosimeter.
机译:在本文中,我将研究与在商业铸造厂制造的用于航天器的定制专用集成电路(ASIC)的使用有关的问题。我将从制造,设备,电路和系统层面研究这个主题。我首先概述用于物理改变电路并增强其电性能的集成电路制造和后处理技术。我从设备的角度研究了MOS晶体管及其变体Floating-Gate MOS晶体管。我讨论了一个从MOS结构的静电派生而来的模型,该模型在整个操作区域上都是连续的,同时保持了一小组物理参数。其次,将介绍浮栅MOSFET的操作,该器件在自适应系统中的使用越来越多。然后将模型扩展到包括MOSFET上电离辐射暴露的影响。从电路的角度,我将研究数字系统中的功率和能量使用问题。电流模式设计方法将作为低功耗逻辑系列电流模式差动逻辑的介绍进行回顾。我将讨论浮栅逻辑,这是一种浮栅晶体管的应用,可通过调整器件阈值来解决低功耗问题。本文的后半部分将重点讨论MOS器件中的辐射效应。首先,我描述了航天器所处的令人不愉快的环境。我继续讨论工程师需要应对的辐射暴露的两个主要影响,即辐射引起的闩锁和总剂量暴露。我将提供不同实验的结果,这些实验旨在评估商用CMOS工艺在太空应用中的可用性。最后,我描述了一种利用辐射对浮栅MOS器件(一种集成的电子微剂量计)的负面影响的应用。

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