Dept. of Electr. Eng., Nat. Central Univ., Jhongli, Taiwan;
built-in self test; integrated circuit interconnections; integrated circuit reliability; integrated memory circuits; logic testing; network routing; network-on-chip; random-access storage; RAM; built-in self-repair method; giga-scale integrated chip; global spare memory; mesh-based NoC;
机译:板载内置自修复RAM方法
机译:RAM1的板级内置自修复方法
机译:具有内部冗余的3-D RAM的内置自修复方案
机译:基于网状NOC的RAM的内置自修复方法
机译:OpenRam记忆的内置自我修复
机译:包含Noc4p的C末端的Noc域介导了Noc4p-Nop14p子模块的形成以及将其并入SSU Processome中。
机译:片上错误检测硅调试的内置自修复