A frequency synthesizer for Mode-1 MB-OFDM UWB applications

摘要

A frequency synthesizer for Mode-1 MB-OFDM UWB applications is realized in 65 nm CMOS. By using a delay-locked loop (DLL) and the proposed multiply-by-two circuit, the frequency synthesizer achieves the in-band spur of -40 dBc for the three-band operation. The proposed multiply-by-2 circuit realizes the quadrature signals, and its input signals do not need the 50% duty cycle. A modified current-starving cell in a DLL is also proposed to reduce the supply noise sensitivity. The measured switching time from 3.342 GHz to 4.488 GHz is around 1.1 ns. The area is 1.25times1.175 mm² with pads and the power is 19.2 mW for 1.2 V supply.