首页> 外文会议>VLSI Design, Automation and Test, 2009. VLSI-DAT '09 >An efficient multi-phase test technique to perfectly prevent over-detection of acceptable faults for optimal yield improvement via error-tolerance
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An efficient multi-phase test technique to perfectly prevent over-detection of acceptable faults for optimal yield improvement via error-tolerance

机译:一种有效的多相测试技术,可以完美地防止过度检测出可接受的故障,从而通过容错来优化产量

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In many multimedia applications, some faults induce errors that are user-imperceptible and thus are acceptable. By not testing for these faults, the effective yield can be significantly increased based on the principle of error-tolerance. However, studies have shown that test patterns generated by a conventional ATPG procedure targeting only unacceptable faults also detect many acceptable faults, resulting in a significant degradation in achievable yield improvement. In this paper we present a multi-phase test technique that can perfectly prevent this over-detection problem. Solid theoretical derivations are provided to validate the effectiveness of this technique. Compared with previous work, only a much smaller number of test patterns are required and thus the required test cost can be much lower. Experimental results on benchmark circuits illustrate the high efficiency of this novel technique.
机译:在许多多媒体应用中,某些故障会导致用户无法察觉的错误,因此是可以接受的。通过不对这些故障进行测试,基于容错原理,可以显着提高有效产量。但是,研究表明,仅针对不可接受的故障的常规ATPG程序生成的测试模式也会检测到许多可接受的故障,从而导致可实现的良率提高显着降低。在本文中,我们提出了一种多相测试技术,可以完美地防止这种过度检测问题。提供了可靠的理论推导来验证该技术的有效性。与以前的工作相比,仅需要数量少得多的测试模式,因此所需的测试成本可以低得多。在基准电路上的实验结果说明了这种新技术的高效率。

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