Recent Progress With Vertical Transistors

摘要

Vertical MOS transistors are a promising approach for channel lengths in the range of 100 to 25nm without the need for extreme fine line lithography. These devices provide high saturation currents due to the short channel length and small lateral size due to the 3D-geometry. The channel is defined by epitaxy which can be grown wih very good layer thickness control and vaious doping concentrations. The doping profiles and electrical characteristics of the transistors are investigated and possible applications for high speed logic and small memory cells will be discussed.