Performance Evaluation of Energy-Efficient Adiabatic Logic Circuit-Based Multiplexer for Low Power Applications

摘要

This paper presents the energy-efficient adiabatic logic (EEAL)-based logic circuits that allows VLSI designer to design and verify various complex units into simpler one. It examines low power characteristics and energy reduction benefits of adiabatic logic circuits using sinusoidal power supply. The design and evaluation of multiplexer using EEAL logic family have been illustrated. Due to the clock skew issues and high complexity in some of the adiabatic logic styles such as ECRL, CAL, PFAL, etc., they are not effective for high speed operations. So, it is focusing on high speed operations as well as energy recovery by using EEAL adiabatic logic style with efficient power clock power consumption. The power dissipation, delay and energy consumption of proposed EEAL-based MUX has been compared with the conventional CMOS-based MUX. The circuits are designed and verified by Cadence Virtuoso EDA tool using 45 nm technology at 1 V.