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Digital bus faults measuring techniques

机译:数字总线故障测量技术

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This paper describes techniques available today to detect digital bus faults on electronic PCB's using in-circuit testers. The paper will also suggest a new test technique called "CLIPS" developed using a Teradyne Z1890 ICT tester. The CLIPS uses a vector technique in which dynamic pulses are applied to the bus lines at high speed. The current pulse responses are picked up by specially designed current sensors, which are amplified and dynamically compared to pre-determined threshold levels. This technique is very fast and back-drive is very short. This makes it much safer to the board and components under test. The tests are run with different bus devices which enabled, at different threshold levels and different "expect" values, to find and diagnose the respective fault. The CLIPS uses specially designed current sensors and amplifier circuits, which perform a differentiation followed by an integration function. This makes the measurements much less sensitive to noise, voltage polarity, and current drift and temperature changes. In concept this technique can be applied to any make of Digital In-Circuit tester.
机译:本文介绍了今天可用的技术,以检测使用在线测试仪的电子PCB上的数字总线故障。本文还将建议使用Teradyne Z1890 ICT测试仪开发的“剪辑”的新测试技术。剪辑使用传感器技术,其中动态脉冲以高速施加到总线线。通过专门设计的电流传感器拾取电流脉冲响应,其被放大和动态地与预定阈值水平进行比较。这种技术非常快,反向驱动器非常短。这使得在被测的电路板和组件上更安全。使用不同的总线设备运行,在不同的阈值水平和不同“期望”值的不同总线设备上运行,以查找和诊断相应的故障。剪辑采用专门设计的电流传感器和放大器电路,该电路执行差异,然后进行集成功能。这使得测量值对噪声,电压极性和电流漂移和温度变化不太敏感。在概念中,该技术可以应用于任何数字压路测试仪。

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