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Design and Implementation of USB3.0 Data Transmission System based on FPGA

机译:基于FPGA的USB3.0数据传输系统的设计与实现

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Aiming at the problems of slow transmission speed and high hardware resources in the traditional USB data transmission system, a USB3.0 data transmission system based on FPGA is designed. The system uses FPGA as the core control chip, and EZ-USB FX3 realizes high-speed data transmission of USB3.0 synchronous Slave FIFO mode through GPIF II general programmable interface. The design scheme has high portability and expandability, can be widely applied to different communication projects. System performance analysis and test results show that the average transmission rate of the system can reach 328MB/S, and the logical resource occupancy rate is less than 1%, realizing high-speed data transmission.
机译:针对传统USB数据传输系统中传输速度和高硬件资源的问题,设计了基于FPGA的USB3.0数据传输系统。该系统使用FPGA作为核心控制芯片,EZ-USB FX3通过GPIF II一般可编程接口实现USB3.0同步从动FIFO模式的高速数据传输。设计方案具有高便携性和可扩展性,可广泛应用于不同的通信项目。系统性能分析和测试结果表明,系统的平均传输速率可以达到328MB / s,逻辑资源占用率小于1%,实现高速数据传输。

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