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Development of High-speed Transmission Error Dynamic Detection System Based on NIOS-II and USB

机译:基于Nios-II和USB的高速传输误差动态检测系统的开发

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This paper proposes a high-speed transmission error (TE) dynamic detection system based on NIOS-II and USB. The detection system is in the realization of data acquisition on a FPGA chip, and sends the collected data to specialized data transmission circuit by the chip NIOS-II CPU core, the data transmission circuit composed of USB2.0 main control chip and FIFO chip, which can realize the two-direction communication between data acquisition circuit and PC, so as to realize the TE detection of high-speed side.
机译:本文提出了基于Nios-II和USB的高速传输误差(TE)动态检测系统。检测系统在FPGA芯片上实现数据采集,并通过芯片Nios-II CPU内核将收集的数据发送到专用数据传输电路,数据传输电路由USB2.0主控制芯片和FIFO芯片组成,这可以实现数据采集电路和PC之间的双向通信,以实现高速侧的TE检测。

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