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COLLABORATIVE CURRICULUM DEVELOPMENT OF AN INDUSTRY-DRIVEN DIGITAL LOGIC DESIGN

机译:行业驱动数字逻辑设计的协同课程开发

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Hardware Description Language and Field Programmable Gate Array (FPGA) have revolutionized the way Digital Logic Design is taught and implemented. Traditional ways of teaching logic design using discrete components (TTL: Transistor-Transistor Logic and CMOS: Complementary Metal Oxide Semiconductors) have been replaced by Programmable Logic Devices (CPLD: Complex Programmable Logic Devices and FPGA). Today, a more standard development process is widely used in industry. The process uses Hardware Description Languages as a design entry to describe the digital systems. The two most widely used Hardware Description Languages in industry are VHDL (Very High Speed Integrated Circuit Hardware Description Language) and Verilog (Verifying Logic). Although most traditional electrical and computer engineering programs have updated their curriculum to include topics in hardware description language and programmable logic design (FPGA/CPLD), two-year and four-year electrical engineering technology programs have fallen behind and moved slowly in updating their curriculum. This paper describes the industry-led faculty training and digital logic design curriculum development that will reshape the way digital logic design is taught in the electrical engineering technology programs. The new curriculum development will provide students with a hands-on educational experience well-respected by industry.
机译:硬件描述语言和现场可编程门阵列(FPGA)彻底改变了数字逻辑设计的方式教导和实现。使用离散组件(TTL:晶体管 - 晶体管逻辑和CMOS:互补金属氧化物半导体)的传统教学方式已被可编程逻辑器件(CPLD:复杂的可编程逻辑器件和FPGA)代替。如今,一个更标准的开发过程广泛用于工业。该过程使用硬件描述语言作为描述数字系统的设计条目。业界中使用的两个最广泛使用的硬件描述语言是VHDL(非常高速集成电路硬件描述语言)和Verilog(验证逻辑)。虽然大多数传统电气和计算机工程方案更新了他们的课程,但在硬件描述语言和可编程逻辑设计(FPGA / CPLD)中包含主题(FPGA / CPLD),两年和四年的电气工程技术计划已落后并在更新课程时缓慢移动。本文介绍了行业导致的教师培训和数字逻辑设计课程开发,将重塑数字逻辑设计在电气工程技术方案中教授的方式。新的课程开发将为学生提供由行业良好尊重的教育经验。

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