Multilayer Perceptron Neural Network Architecture using VHDL with Combinational Logic Sigmoid Function

摘要

This paper presents the hardware realization of fast and flexible feed forward neural network which is capable of dealing with fixed point arithmetic operations using VHDL with minimum number of CLB slices and good speed of performance. The hardware architecture of neural network with two input, one output and three hidden neurons occupies only 44% of CLB slices. An efficient and fast carry look-ahead adder and Booth multiplier are the essential building blocks of the processing elements to perform parallel computation in the neural network. The activation function has been carried out based on piecewise linear approximation only with combinational logic circuits.