Performance Analysis of WK-Recursive and Torus Routing Algorithms for NoCs

摘要

Network on Chip (NoC), specific parameters such as topology, switching methods and routing algorithms, have a huge impact on performance and the cost of the NoCs. In this work, we propose a deterministic mirror routing algorithm for Torus topology and an adaptive routing for WK-recursive topology. To evaluate the routing algorithms, a complete NoC synthesizable framework was implemented in Verilog HDL. Congestion scenarios in the NoC framework have been simulated, and the routing algorithms are evaluated for latency, area, and power. Evaluation shows that the performances of the proposed algorithms are superior compared to classical routing algorithms.