The Ni-silicide phases and morphology in Ni fully silicided gates were investigated for varying deposited Ni to Si thickness ratios and rapid thermal processing conditions. The presence of NiSi2, NiSi, Ni3Si2, Ni2Si, Ni3iSii2 and NijSi as predominant phases was observed for increasing Ni to Si thickness ratios. In most samples typically two of these phases were detected by X-ray diffraction. No secondary phases were detected on NijSi samples (Ni/Si uiickness ratio ~1.7). For samples targeting NiSi as gate electrode, RBS and TEM analysis confirmed a layered structure with NiSi at the interface and a Ni-rich silicide layer (NijSi, Ni3Si2) on top. Process conditions were determined for formation of gate electrodes for NiSi, NiaSi and N13S1. Only small changes in flat-band voltage or work function were found between these phases on SiO2 or SiON for undoped samples. While significant changes in work function with dopants were observed for NiSi on SiO2, little or no effects were found for NiSi on HfSiON (suggesting Fermi-level pinning) and for Ni2Si on SiO2. An increase of > 300 mV was found from NiSi to NisSi on HfSiON, suggesting unpinning of the Fermi-level with the Ni-rich silicide.
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机译：研究了Ni-硅化物相和形态，用于改变沉积Ni至Si厚度比和快速热处理条件。观察到NISI2，NISI，Ni3SI2，Ni2SI，Ni3isi2和Nijsi作为主要相的存在，用于增加Ni至Si厚度比。在大多数样品中，通常通过X射线衍射检测这些相中中的两种。在Nijsi样品上检测到二次相（Ni / Si Uiickness比率〜1.7）。对于靶向NISI作为栅电极的样品，RBS和TEM分析证实了在界面中的NISI和Ni的硅化物层（Nijsi，Ni3Si2）的分层结构。确定NISI，NIASI和N13S1的栅电极的形成条件。对于未掺杂的样品，在SiO2或Sion上的这些阶段中发现了平带电压或功函数的小变化。虽然在SiO 2上观察到NISI的NISI与掺杂剂的工作功能的显着变化，但在HFSION（表明费米级钉扎）和SIO 2上的Ni2SI对NISI几乎没有任何影响。从NISI对HFSION的NISI中发现了> 300mV的增加，表明与富含Ni的硅化物的FERMI水平造成不纯化。
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