Development of a 20 GS/s Sampler Chip in 130nm CMOS Technology

摘要

In the scope of time of flight measurements at the scale of a few pico-seconds, a CMOS fast sampler chip is being developed in 130nm CMOS technology. It includes a 10-20GS/s timing generator lockable on a 40-80 MHz clock and four channels of 250 sampling cells able to record up to of 25 ns of analog information. Each sampling cell is integrated with a comparator allowing a 12-bit analog to digital conversion. The design and preliminary tests results are presented.