FPGA Based Architecture For Digitization Of Radar Signals And Transmission Through Gigabit Ethernet

摘要

The paper presents implementation of User Datagram Protocol (UDP) based Ethernet protocol for Radar PC-based display on the Field Programmable Gate Array (FPGA). Critical bottleneck of our application is to achieve more than 160Mbps throughput requirement for sending sufficient amount of data for Radar-display. High-speed data transfer using Ethernet finds application in most modern day communication systems for multicasting and broadcasting. This design has been mainly done for data transfer in radar systems but can be programmed and used for variety of applications involving high-speed data transfer. The paper explains the use of FPGA for the implementation, providing all the design models and supporting results.