A modular barrier removal slurry has been developed that permits easy adjustment of the relative removal rates of Copper and Dielectric in order to allow optimization of final wafer topography. Good agreement was obtained for both blanket and pattern wafer response, and significant reduction in topography was achieved during the barrier removal step without compromising dielectric loss. Initial defectivity and post-polish surface quality data is encouraging. Further research is currently expanding the modeling to include all the slurry components and process interactions on the polishing consumables to provide more detailed process recipes for a variety of specific integration schemes.
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