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Active noise cancellation using aggressor-aware clamping circuit for robust on-chip communication

机译:使用侵略者感知钳位电路进行主动噪声消除,用于强大的片上通信

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As the IC process technology scales the on-chip wiring network becomes denser. Increasing aspect ratios of the on-chip interconnects lead to higher coupling capacitances and ultimately higher cross-talk noise, which degrades signal integrity. In this paper we propose a clamping circuit for on-chip busses, which clamps a victim wire in an on-chip bus based on the states of its immediate aggressors. These clampers help the driver of the victim wire in draining the charge, which is induced due to cross-talk between aggressors and victim wires. This helps in decreasing the cross-talk peak noise and also the delay variability (referred to as delay noise). Simulation results for a 10 mm long communication bus (parallel wires) laid at minimum pitch in 0.13 /spl mu/m CMOS technology show that a reduction of 30%(17.6%), 37%(27.2%) and 26%(65.8%) in cross-talk peak noise amplitude (delay noise) is observed for point to point, parallel repeater inserted and staggered repeater inserted respectively when only immediate neighbours are considered (1/sup st/ order). Furthermore the aggressor-aware clamper is very effective in avoiding glitches, which may occur when more aggressors, in addition to the immediate ones are also switching simultaneously in the same.
机译:由于IC工艺技术缩放片上线网络变得更加密集。片上互连的增加的宽高比导致较高的耦合电容,并最终降低信号完整性的串扰噪声。在本文中,我们提出了一种用于片上总线的夹紧电路,其基于其直接侵略者的状态夹在片上总线中的受害者线。这些夹子帮助受害丝的驾驶员在排出充电时,这是由于侵略者和受害者之间的串扰而引起的。这有助于降低串扰峰值噪声以及延迟变化(称为延迟噪声)。在0.13 / SPL MU / M CMOS技术中以最小间距铺设的10mm长通信总线(平行线)的仿真结果表明,减少30%(17.6%),37%(27.2%)和26%(65.8%) )在串扰峰值噪声幅度(延迟噪声)中,观察点对点,并行中继器插入和交错的中继器分别在仅考虑立即邻居(1 / SUP ST / ORDED)时插入和交错的中继器。此外侵略者感知夹持器是在避免毛刺,当更多的侵略者,除了即时那些也以相同的同时切换可能发生非常有效的。

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