A low overhead high speed histogram based test methodology for analog circuits and IP cores

摘要

In this paper we present a methodology to test complex analog circuits. We employ the proposed histogram-correlation technique to test these circuits. The test data for the circuit under test is collected on site, during the normal functioning of the circuit. This eliminates the need for complex test generators and costly testers. We also extend our methodology to test analog IP cores by designing a core test wrapper for analog circuits. Experimental results are presented for a continuous-time state-variable filter which is one of the circuits in the mixed signal benchmark initiative. The percentage deviation of correlation values for a faulty CUT ranged from 4% to 97% with an uncertainty in the fault free correlation values of about 2.2%, ensuring detection of all injected faults. The experimental results show that our proposed technique is extremely effective and is currently the best available test solution.