首页> 外文会议>Great lakes symposium on VLSI >Using a reconfigurable field programmable gate array to demonstrate boundary scan with built in self test
【24h】

Using a reconfigurable field programmable gate array to demonstrate boundary scan with built in self test

机译:使用可重配置的现场可编程门阵列来演示边界扫描,内置自检

获取原文

摘要

The XC4000 Logic Cell Array Family of field programmable gate arrays developed by Xilinx includes support for the IEEE Standard 1149.1 Test Access Port and Boundary Scan Architecture. Boundary-scan with built-in self-test is known to provide tests of high quality. The design and implementation of boundary-scan with built-in self-test that conforms fully to the IEEE Standard 1149.1 for the XC4000 device is presented. Fault simulation was performed to evaluate the effectiveness of the built-in self-test. Hardware was realized with the XC4003PC84-6 used on the Xilinx demo board. The boundary scan and self test logic was controlled via the widely available parallel printer port of an IBM compatible PC. This results in an ideal hardware/software combination for use in teaching and demonstrating boundary scan and self-test principles.
机译:XILINX开发的XC4000逻辑单元阵列的现场可编程门阵列包括对IEEE标准1149.1测试访问端口和边界扫描架构的支持。已知具有内置自检的边界扫描,可提供高质量的测试。呈现了与XC4000设备完全符合IEEE标准1149.1的内置自检的边界扫描的设计和实现。进行故障模拟以评估内置自检的有效性。使用XILINX演示板上使用的XC4003PC84-6实现了硬件。通过IBM兼容PC的广泛可用的并行打印机端口控制边界扫描和自检逻辑。这导致理想的硬件/软件组合用于教学和展示边界扫描和自检原理。

著录项

相似文献

  • 外文文献
  • 中文文献
  • 专利
获取原文

客服邮箱:kefu@zhangqiaokeyan.com

京公网安备:11010802029741号 ICP备案号:京ICP备15016152号-6 六维联合信息科技 (北京) 有限公司©版权所有
  • 客服微信

  • 服务号