Standard cell design style has been widely applied for the design automation of VLSI circuits because of the easy implementation of the layout design. Since the aim of most standard cell design systems is to minimize the utilization of chip area, the number of feedthrough cells in a standard cell layout will be further minimized to reduce the layout size. In this paper, first, we model a row assignment problem to minimize the number of feedthrough cells in a standard cell placement. Furthermore, an efficient heuristic approach is proposed to minimize the number of feedthrough cells in standard cell placement. The time complexity of the heuristic approach is further proved to be in O(|E|log|E|) time, where |E| is the number of edges in a separation graph. Finally, two standard cell benchmarks, Primary1 and Primary2, have been tested on the proposed approach for the assignment of different number of rows.
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机译：标准电池设计风格已广泛应用于VLSI电路的设计自动化，因为布局设计方便设计。由于大多数标准单元设计系统的目的是最小化芯片区域的利用，因此将进一步最小化标准电池布局中的馈通单元的数量以减少布局尺寸。在本文中，首先，我们模拟行分配问题，以最小化标准小区放置中的馈通单元的数量。此外，提出了一种高效的启发式方法，以最小化标准电池放置中的馈通细胞的数量。启发式方法的时间复杂性进一步证明是在O（| e | log | e |）时间，其中e |是分离图中的边的数量。最后，已经测试了两个标准的单元基准，PRIMACT1和PRIMIC2，用于分配不同数量的行数。
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