FPGA resources reduction with multiplexing technique for implementation of ANN-based harmonics extraction by mp-q method

摘要

An novel multiplexing technique applied on a neural harmonics extraction method is presented in this paper. This structure can be used in nonlinear loads compensation with Active Power Filters. The approach is composed of a neural Phase Lock-Loop and a neural reference current generator based on an efficient formulation of the instantaneous reactive power theory. For the purpose of harmonics suppression and reactive power compensation, the whole architecture is composed of three Adaline Neural Networks whose structure leads to an important consumption of Field Programmable Gate Array resources during implementation. The presented technique uses only one Adaline and keeps the immunity of the proposed approach under non-sinusoidal and unbalanced conditions of voltage. Simulation results of the neural harmonics detection system connected to a reference current control shows balanced and sinusoidal source currents under various conditions. Results with experimental measurement made on an Active Power Filters test bench demonstrate its good performances on harmonics filtering. Moreover, the simple structure from the new approach called mp-q method shows a significant resource reduction.