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Softpal implementation and mapping technology for FPGAs with dedicated resources
Softpal implementation and mapping technology for FPGAs with dedicated resources
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机译:具有专用资源的FPGA的Softpal实现和映射技术
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摘要
A softPAL implementation and mapping method are described. The implementation utilizes both LUTs and architecture-specific logic circuits to implement softPAL functions, and selects from several implementations in order to decrease delay in function implementation. The method describes techniques for estimating p-terms in a 2-bounded sub-graph, factoring methods, mapping strategies for LUTs and dedicated logic elements, and delay optimization of critical paths.
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