ARINC659 bus control chip is a bus interface chip which supports 4-way redundancy, and a chip which needs to communicate with the processor through PCI9054. This article has made a detailed analysis about local bus timing of the chip PCI9054, designed a host interface unit supporting PCI9054, and programmed the design on FPGA using Verilog HDL language, which accomplishes rapid data read and write and high-speed communication with PCI bus. The program works steadily, has an accurate transmission of data, and can be expanded to other data-transfer system which needs the PCI bus. Currently, the design of this host interface unit has finished the stage of function and timing simulation verification, been able to support PCI9054 to access the internal memory and registers of ARINC659 Bus Control Chip in the combined method of single-cycle and burst, and passed verifying test in FPGA prototype system based on Xilinx.
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