首页> 外文会议>ASME international technical conference and exhibition on packaging and integration of electronic and photonic microsystems >ATOMIC LAYER DEPOSITED TIO2 AS SACRIFICIAL LAYERS AND INTERNAL COATINGS FOR NANOSCALE GAPS
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ATOMIC LAYER DEPOSITED TIO2 AS SACRIFICIAL LAYERS AND INTERNAL COATINGS FOR NANOSCALE GAPS

机译:原子层沉积的TIO2作为纳秒级间隙的专用层和内部涂层

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A key component of the MEMS cryogenic cooling systems we are developing is a MEMS compressor. Its function is to compress the refrigerants used in the cooling cycle. Layers of polyimide are stacked and patterned on a silicon wafer to create micro check-valves and a compression chamber over which a diaphragm is suspended. To achieve the high (4:1) pressure ratio needed for the refrigeration cycle, the polyimide diaphragm needs to be fabricated with minimal dead volume beneath it, hence the need for a sacrificial layer with thickness of 100-300 nm. The topography created by the check-valves and valve-seats makes atomic layer deposition (ALD) ideal due to its conformality. Furthermore, following sacrificial layer release, the inside of the compression chamber will also need to be coated with a hermetic moisture barrier layer to enable the device to operate at 4 atmospheres without leaking. ALD is therefore also ideal for the final internal coating because it does not require line-of-sight. Towards this end, we demonstrate here the concept of using ALD TiO_2 as a sacrificial layer to create a 5 mm × 5 mm × 20 μm-thick polyimide membrane, suspended by ~ 100-350 nm above a silicon wafer, followed by a second thinner ALD coating of the interior surfaces bounded by wafer and membrane. The air gap under the membrane, defined by the released sacrificial layer, was measured at about 130-370 nm using two independent methods: reflectometry, and FIB cross sectioning followed by SEM imaging of the air gap's cross section. The membrane was removed from one chip and the thickness of the internal coating on the underlying silicon was measured with the reflectometer to be about 40 nm. We thus demonstrate the use of ALD TiO_2 as both a sacrificial layer for fabricating nanoscale gaps, as well as for coating nanoscale internal cavities and channels.
机译:我们正在开发的MEMS低温冷却系统的关键组件是MEMS压缩机。其功能是压缩冷却循环中使用的制冷剂。聚酰亚胺层在硅晶片上堆叠并构图以形成微型止回阀和压缩室,膜片悬挂在压缩室上。为了实现制冷循环所需的高(4:1)压力比,聚酰亚胺隔膜的制造必须在其下方具有最小死体积,因此需要厚度为100-300 nm的牺牲层。由止回阀和阀座形成的形貌使原子层沉积(ALD)具有理想的保形性。此外,在牺牲层释放之后,压缩室的内部也将需要覆盖一层密封的防潮层,以使设备能够在4个大气压下工作而不会泄漏。因此,ALD也是最终内部涂层的理想选择,因为它不需要视线。为此,我们在此演示使用ALD TiO_2作为牺牲层来创建5 mm×5 mm×20μm厚的聚酰亚胺膜的概念,该膜悬浮在硅片上方约100-350 nm处,然后再铺第二层晶圆和薄膜界定的内表面的ALD涂层。使用两种独立的方法在约130-370 nm下测量由释放的牺牲层限定的膜下的气隙:反射法和FIB横截面,然后对气隙的横截面进行SEM成像。从一个芯片上除去该膜,并用反射计测量在下面的硅上的内部涂层的厚度为约40nm。因此,我们证明了ALD TiO_2作为制造纳米级间隙以及涂覆纳米级内部空腔和通道的牺牲层的用途。

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