Computation from Devices to System level Thermodynamics

摘要

Energy or Power minimization is a universal macro-constraint for on-chip architectures. The computer industry is actively dealing with trade-offs between performance and energy efficiency. The intent of this work is to develop theoretical concepts for bridging architectures with energy efficient computing. We evaluate the efficiency of an ideal computing architecture at the limits of scaling. We achieve this by using concepts from thermodynamics and quantum mechanics and using a simplified layout to represent the computing system. Although efforts have been undertaken on scalability of single devices, we believe that this is the first attempt to estimate energy in large computing systems and in a single switch using the same physical principles. Similar to design of heat engines, we hope that these concepts will help in evaluating different chip architectures and compare them to a limiting and ideal computing engine.