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FPGA-Based Platform for Fast Accurate Evaluation of Ultra Low Power SoC

机译:基于FPGA的平台可快速准确评估超低功耗SoC

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Accurate evaluation of Ultra Low Power Systems on Chip (ULP SoC) is a huge challenge for designers and developers. In embedded applications, especially for Internet of Things end-node devices, ULP SoCs have to interact with their environment and need self-management. For this kind of applications, modelling a complete SoC, including processor(s), memories, all the peripherals components, their interaction and low-power policies, can be very complex in terms of developments and benchmarking. In order to cope with this challenge, an approach is to implement the desired system on FPGA with a monitoring infrastructure dedicated to fast and accurate performance evaluation. In this paper, we propose a set of different tools used during the evaluation step that can also be easily implemented on the final product and used by the system itself for self-assessment to enable adaptive behaviour. Illustrated by a simple architecture implemented on an FPGA-based platform, this method brings flexible, cycle accurate, fast and reliable performance evaluation and self-evaluation, with the possibility to use the platform for low-cost prototyping.
机译:对于设计人员和开发人员而言,准确评估超低功耗片上系统(ULP SoC)是一项巨大的挑战。在嵌入式应用程序中,特别是对于物联网终端节点设备,ULP SoC必须与其环境进行交互并需要自我管理。对于这类应用,要对完整的SoC(包括处理器,存储器,所有外围设备组件,它们的交互作用和低功耗策略)进行建模,就开发和基准测试而言可能非常复杂。为了应对这一挑战,一种方法是在FPGA上使用专用于快速准确的性能评估的监控基础架构来实现所需的系统。在本文中,我们提出了一套在评估步骤中使用的不同工具,这些工具也可以很容易地在最终产品上实施,并且可以由系统本身用于自我评估,以实现自适应行为。通过在基于FPGA的平台上实现的简单架构进行说明,该方法带来了灵活,周期精确,快速而可靠的性能评估和自我评估,并有可能将该平台用于低成本原型制作。

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