Supply voltage scaling is an effective technique to reduce the power consumption of modern VLSI circuits. However, the scaling extent is often limited by variation-induced failures of on-chip memories, such as cache units. Hence, the memory components dictate the minimum voltage for the entire system below which reliable operation is not guaranteed. These failures can be permanent, which reduce the yield, or transient, such as soft-errors, impacting runtime operation. Both permanent and transient failures will significantly affect the overall energy-efficiency and hence, need to be addressed in order to achieve reliable low-voltage cache operation. This issue is more pronounced in the design of devices with a stringent energy budget, such as IoT applications. This paper studies different memory failure mechanisms across wide supply voltage range, and evaluates the disposable counter-measures such as error correcting codes and architectural techniques as well as the extent of their applicability for reliable and energy-efficient cache operation.
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