Design for Hardware In-the-Loop Real-Time Simulation Test of Combined Seeker

摘要

Hardware in-the-loop simulation test has the advantage of live test, digital simulation test, which can build the lifelike test environment. This kind of test can carry through repeated test of multi-sample. The key technique of the hardware in-the-loop simulation test is real-time algorithmic and communication technology. In this paper, based on reflective memory network, the design for hardware in-the-loop simulation test of combined seeker will be carry on. And the key problems such as time synchronization and data synchronization are also be researched. The issues about system collaboration and real-time communication in test in hardware in-the-loop simulation test are resolved, which can provide a certain value in carrying out joint simulation test.