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Etch planarization - A new approach to correct non-uniformity post chemical mechanical polishing

机译:蚀刻平面化 - 一种纠正非均匀性后化学机械抛光后的新方法

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The introduction of 3D devices and new materials at sub 28 nm nodes presents challenges for within-wafer and wafer-to-wafer CMP thickness uniformity control that are critical for device yield and performance. Upon CMP the typical thin film uniformity across the whole wafer is unable to meet the target of less than 2 nm 3σ variation. Furthermore, wafer-to-wafer uniformity variation requires a wafer by wafer approach to uniformity correction. In this work, a novel etch planarization approach is presented that combines a conventional production-proven etch process that is temperature sensitive on an inductively coupled plasma reactor with die level thermal controlled electrostatic chuck (ESC). Improved process control enables cost effective uniformity improvements in excess of 85%. In addition, the approach provides wafer-to-wafer tuning capabilities.
机译:3D设备的引入和Sub 28 NM节点的新材料呈现出晶片内和晶片到晶片CMP厚度均匀性控制的挑战,这对于器件产量和性能至关重要。在CMP时,整个晶片上的典型薄膜均匀性不能满足小于2nm3σ变化的目标。此外,晶片到晶片均匀性变化需要晶片方法均匀校正的晶片。在这项工作中,提出了一种新的蚀刻平面化方法,其结合了一种与电感耦合的等离子体反应器上的温度敏感的传统生产证明蚀刻工艺,其与模具水平热控制的静电卡盘(ESC)相结合。改进的过程控制使得经济有效的均匀性改善超过85%。此外,该方法提供了晶片到晶圆调谐功能。

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