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Energy-efficient stochastic matrix function estimator for graph analytics on FPGA

机译:用于FPGA的图表分析的节能随机矩阵功能估计

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Big Data applications require efficient processing of large graphs to unveil information that is hidden in the structural relationships among objects. In order to cope with the growing complexity of data sets many graph algorithms can be expressed to apply linear algebra operations for which highly efficient algorithms exist. In this paper we present an FPGA implementation of a stochastic matrix function estimator, a powerful framework for statistical approximation of general matrix functions. We apply the accelerator to the subgraph centrality method for ranking nodes in complex networks. Performance and energy consumption results are based on actual measurements of a POWER8 hybrid compute platform. A single FPGA co-processor improves the runtime by more than 50% compared to multi-threaded software while delivering the same estimation quality. In terms of energy consumption the FPGA outperforms CPU and GPU solutions by a factor of 13× and 3×, respectively. Our results show that FPGA co-processors can provide significant gains for graph analytics applications and are a promising solution for energy efficient computing in the data center.
机译:大数据应用需要有效地处理大图来揭示隐藏在物体之间的结构关系中的信息。为了应对数据集的增长复杂性,可以表达许多图形算法以应用高效算法的线性代数操作。在本文中,我们介绍了随机矩阵函数估计器的FPGA实现,这是一般矩阵函数的统计近似的强大框架。我们将加速器应用于复合网络中的节点的子图中数方法。性能和能量消耗结果基于Power8混合计算平台的实际测量。与多线程软件相比,单个FPGA协处理器将运行时间提高了50%以上,同时提供相同的估计质量。在能量消耗方面,FPGA分别优于CPU和GPU解决方案,分别为13倍和3倍。我们的研究结果表明,FPGA协处理器可以为图形分析应用提供显着的收益,并且是数据中心中节能计算的有希望的解决方案。

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