A power efficient USB 2.0 device controller architecture and its implementation

摘要

With the ubiquitous use of a USB 2.0 device controller in most of our electronic devices ranging from mobile handheld devices to external hard disks and gaming controllers, it is getting more and more important that a new power efficient USB 2.0 device controller architecture is define which addresses battery life issues in current devices. This paper will first describe how a USB 2.0 device controller works and the underlying root cause of its power inefficiency. The paper will then propose an architecture which is more power efficient using clock gating techniques as well as a fine grain power gating approach based on data traffic. The open source USB 2.0 device controller soft-core which is maintained by the OpenCores Organization will be used as a base design to be improved on.