Effects of Substrate Design on Underfill Voiding Using the Low Cost, High Throughput Flip Chip Assembly Process

摘要

The problem of voiding is an area of concern in the low cost, high throughput, or "no-flow" flip chip assembly process. This process involves placement of a chip directly onto the pad site with pre-dispensed no-flow underfill on it. The forced motion causes a convex flow front to pass over pad and mask-opening features promoting void capture. This paper determines the effects of substrate design on the phenomena of underfill voiding using the no-flow process. A full-factorial design experiment analyzes several empirically determined factors that can affect void capture in no-flow processing. These process parameters included pad height, solder mask opening height, pad/solder mask opening separation, pad pitch, chip placement speed, and underfill viscosity. The substrates for the tests were designed and manufactured at Georgia Tech's Packaging Research Center to ensure process control. The design consisted of 6 factors with a mix of levels for each. These included four levels of copper pad heights, two solder mask opening heights, three pad/solder mask separation distances between copper pad and solder mask opening edges, three feature (pad and mask openings) pitches, two chip placement speed, and four pad/mask geometries separated into quadrants (or zones) of the pad sites. The experiments essentially involve placement of a transparent glass chip upon the pad site through a pre-dispensed no-flow underfill. The subsequent flow of the underfill is carefully recorded and the resultant voids are logged and analyzed. The response variable is defined as the number of voids created in the process, and is further analyzed for the location and any visible modes of void formation. Thus, potentially improved substrate designs could be the result of this research.