Efficient Hardware Architecture Design of Adaptive Search Range for Video Encoding

摘要

In this paper, we propose an adaptive search range allocation algorithm for high-performance HEVC encoder and a hardware architecture suitable for the proposed algorithm. In order to improve the prediction performance, the existing motion vector is configured with the motion vectors of the neighboring blocks as prediction vector candidates, and a search range of a predetermined size is allocated using one motion vector having a minimum difference from the current motion vector. The proposed algorithm reduces the computation time by reducing the size of the search range by assigning the size of the search range to the rectangle and octagon type according to the structure of the motion vectors for the surrounding four blocks. Moreover, by using all four motion vectors, it is possible to predict more precisely. By realizing it in a form suitable for hardware, hardware area and computation time are effectively reduced.