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Partial Reconfiguration-oriented Design of Logic Controllers

机译:面向局部重配置的逻辑控制器设计

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Paper presents the CAD system, referred to as PeNCAD, which supports the design of logic controllers. The system developed at the University of Zielona Gora allows designing concurrent logic controllers specified by means of Petri net. The designed control system is implemented in the reprogrammable FPGA structure. The further development of the system has been discussed in details regarding the application of the partial reconfiguration systems. The use of the partial reconfiguration FPGA-based systems in the process of logic controllers' design enables to increase their flexibility and functionality. Additional consequences come in the form of the decrease in hardware requirements needed for the implementation processes of the logic controller. The reconfiguration consists in replacing of the subnet associated with a macroplace. The Xilinx FPGA devices were used while carrying out the tests.
机译:论文介绍了称为PeNCAD的CAD系统,该系统支持逻辑控制器的设计。由Zielona Gora大学开发的系统允许设计通过Petri网指定的并发逻辑控制器。设计的控制系统以可重新编程的FPGA结构实现。已经关于部分重配置系统的应用详细讨论了系统的进一步开发。在逻辑控制器的设计过程中使用基于FPGA的部分重配置系统可以提高其灵活性和功能性。额外的后果以逻辑控制器的实现过程所需的硬件要求减少的形式出现。重新配置包括替换与宏场所关联的子网。在进行测试时,使用了Xilinx FPGA器件。

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