Comput. Eng. Res. Center, Univ. of Texas, Austin, TX, USA;
embedded systems; integrated circuit design; software engineering; system-on-chip; MISR; SoC designs; arithmetic operations; embedded processor; low cost partial X-masking step; mask data; multiinput signature register; signature analysis; software-based test; system-on-chip; Clocks; Decision support systems; Discrete Fourier transforms; Fault tolerance; Fault tolerant systems; Nanotechnology; Very large scale integration;
机译:故障电路的未知输出值和输出响应压缩
机译:利用测试响应中未知值的分布来优化测试输出压缩器
机译:在测试响应中利用未知值的分布,以优化测试输出压缩机
机译:使用嵌入式处理器压实包含未知数未知的输出响应
机译:带有可重新配置的实时嵌入式图像处理器的紧凑型相机,用于药物胶囊检查
机译:嵌入式SIW滤波器的单频带和双频带滤波响应功率分配器具有改善的输出隔离度
机译:X取消MISR架构,用于未知值的输出响应压缩
机译:Unix sTREams仿真嵌入式aN / UYK-44(V)处理器的输入/输出控制器(IOC)。