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2015 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems
2015 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems
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1.
On-line detection of intermittent faults in digital-to-analog converters
机译:
在线检测数模转换器中的间歇性故障
作者:
Soma Mani
会议名称:
《2015 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems》
|
2015年
关键词:
digital signatures;
digital-analogue conversion;
fault diagnosis;
information theory;
statistical analysis;
DAC;
digital signature;
digital-to-analog converter;
information theory;
internal circuit design;
online intermittent fault detection;
statistical procedure;
Clocks;
Electrical fault detection;
Entropy;
Fault detection;
Hardware;
Histograms;
On-line test;
Testing for analog and mixed circuits;
Transient / soft faults and errors;
2.
Exploring error-tolerant low-power multiple-output read scheme for memristor-based memory arrays
机译:
探索基于忆阻器的存储器阵列的容错低功耗多输出读取方案
作者:
Adeyemo Adedotun A.
;
Mathew Jimson
;
Jabir Abusaleh M.
;
Pradhan Dhiraj K.
会议名称:
《2015 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems》
|
2015年
关键词:
memristor circuits;
power consumption;
readout electronics;
resistive RAM;
I-H architecture;
ReRAM;
closed form expression;
energy consumption reduction;
error-tolerant low-power multiple-output read scheme;
inverted-Hamming architecture;
memory technology;
memristor-based memory array;
multiple-cell readout method;
noise margin effect;
power consumption;
read-write scheme;
resistive random access memory;
single-bit write error;
sneak-path prone crossbar architecture;
zero sneak-path;
Analytical models;
Arrays;
Encod;
3.
Piecewise-functional broadside tests based on intersections of reachable states
机译:
基于可达状态交集的分段功能宽边测试
作者:
Pomeranz Irith
会议名称:
《2015 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems》
|
2015年
关键词:
circuit testing;
delay fault overtesting;
functional clock cycle;
functional operation condition;
piecewise-functional broadside test;
power dissipation;
reachable state intersection;
Benchmark testing;
Circuit faults;
Computational modeling;
Delays;
Fault tolerance;
Fault tolerant systems;
Switches;
Broadside tests;
functional broadside tests;
switching activity;
transition faults;
4.
A BIST approach for counterfeit circuit detection based on NBTI degradation
机译:
基于NBTI降级的BIST伪造电路检测方法
作者:
Savanur Puneet Ramesh
;
Alladi Phaninder
;
Tragoudas Spyros
会议名称:
《2015 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems》
|
2015年
关键词:
ageing;
built-in self test;
negative bias temperature instability;
BIST approach;
HSPICE simulation;
NBTI aging factor;
NBTI degradation;
aging delay;
built-in-self-test;
counterfeit circuit detection;
negative bias temperature instability;
size 45 nm;
size 65 nm;
Accuracy;
Aging;
Benchmark testing;
Built-in self-test;
Delays;
Logic gates;
Stress;
5.
A fast and scalable fault injection framework to evaluate multi/many-core soft error reliability
机译:
快速,可扩展的故障注入框架,可评估多核/多核软错误的可靠性
作者:
Rosa Felipe
;
Kastensmidt Fernanda
;
Reis Ricardo
;
Ost Luciano
会议名称:
《2015 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems》
|
2015年
关键词:
embedded systems;
multiprocessing systems;
parallel processing;
performance evaluation;
ARM processor;
MIPS;
OVPSim-FIM;
RTOS;
chip power density;
manycore soft error reliability;
multicore soft error reliability;
multiprocessor embedded system;
scalable fault injection framework;
simulation-based fault injection framework;
Benchmark testing;
Context;
Context modeling;
Monitoring;
Operating systems;
Program processors;
Registers;
6.
Software-based on-chip thermal sensor calibration for DVFS-enabled many-core systems
机译:
基于软件的片上热传感器校准,用于支持DVFS的多核系统
作者:
Teravainen Sami
;
Haghbayan Mohammad-Hashem
;
Rahmani Amir-Mohammad
;
Liljeberg Pasi
;
Tenhunen Hannu
会议名称:
《2015 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems》
|
2015年
关键词:
calibration;
multiprocessing systems;
power aware computing;
DVFS-enabled manycore system;
Intel SCC;
Intel single-chip cloud computer;
current VF level;
current voltage-frequency level;
dynamic voltage-and-frequency scaling;
fine-grained DTM technique;
fine-grained dynamic thermal management technique;
software-based auto-calibration strategy;
software-based on-chip thermal sensor calibration;
temperature gradient;
Calibration;
Radiation detectors;
System-on-chip;
Temperature measurement;
Temperature sensors;
Vol;
7.
Hot spare components for performance-cost improvement in multi-core SIMT
机译:
热备用组件可提高多核SIMT的性能成本
作者:
Mozafari S. Hasan
;
Meyer Brett H.
会议名称:
《2015 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems》
|
2015年
关键词:
cost reduction;
instruction sets;
multiprocessing systems;
performance evaluation;
cost reduction;
hot spare components;
multicore SIMT;
multicore single-instruction multiple-thread processor;
performance-cost improvement;
redundant components;
Benchmark testing;
Context;
Degradation;
Delays;
Multicore processing;
Program processors;
Redundancy;
8.
REPAIR: Hard-error recovery via re-execution
机译:
维修:通过重新执行硬错误恢复
作者:
Soman Jyothish
;
Miralaei Negar
;
Mycroft Alan
;
Jones Timothy M.
会议名称:
《2015 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems》
|
2015年
关键词:
error analysis;
fault tolerance;
integrated circuit reliability;
integrated circuit testing;
IRU;
REPAIR;
fault tolerance;
hard-error recovery;
instruction reexecution unit;
parametric variation;
permanent fault;
processor reliability;
recovery from errors in processors by allowing instruction re-execution;
transistor wearout;
Arrays;
Benchmark testing;
Maintenance engineering;
Multicore processing;
Pipelines;
Redundancy;
Registers;
9.
RotR: Rotational redundant task mapping for fail-operational MPSoCs
机译:
RotR:故障操作MPSoC的旋转冗余任务映射
作者:
Nahar Badrun
;
Meyer Brett H.
会议名称:
《2015 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems》
|
2015年
关键词:
performance evaluation;
redundancy;
system-on-chip;
DMR system;
RotR mapping;
TMR system;
active-redundancy-based system;
fail-operational MPSoC;
reliability;
rotational redundant task mapping;
safety-critical application;
system redundancy state;
Computer architecture;
Fault tolerant systems;
Redundancy;
Transient analysis;
Tunneling magnetoresistance;
10.
Asymmetric ECC organization in 3D-memory via spare column utilization
机译:
通过使用备用列来在3D内存中进行不对称ECC组织
作者:
Hyunseung Han
;
Joon-Sung Yang
会议名称:
《2015 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems》
|
2015年
关键词:
error statistics;
integrated circuit reliability;
integrated memory circuits;
three-dimensional integrated circuits;
3D-IC technology;
3D-memory;
asymmetric ECC organization;
bit-error rate;
die reliability;
processor-memory structure;
spare column utilization;
upper layer memory;
Alpha particles;
Error analysis;
Error correction codes;
Neutrons;
Organizations;
Reliability;
Very large scale integration;
11.
Approximate compressors for error-resilient multiplier design
机译:
近似压缩器,可实现抗错误的乘法器设计
作者:
Zhixi Yang
;
Jie Han
;
Lombardi Fabrizio
会议名称:
《2015 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems》
|
2015年
关键词:
approximation theory;
integrated circuit design;
multiplying circuits;
PPR;
approximate circuit design;
approximate compressor;
approximate multiplier design;
error-resilient image;
error-resilient multiplier design;
image sharpening algorithm;
multiplication;
partial product reduction;
signal processing application;
signal-to-noise ratio;
Accuracy;
Adders;
Approximation algorithms;
Approximation methods;
Compressors;
Delays;
Signal to noise ratio;
Approximate circuit design;
Compressor;
Multiplier;
12.
Security analysis of logic encryption against the most effective side-channel attack: DPA
机译:
针对最有效的边信道攻击进行逻辑加密的安全性分析:DPA
作者:
Yasin Muhammad
;
Mazumdar Bodhisatwa
;
Ali Sk Subidh
;
Sinanoglu Ozgur
会议名称:
《2015 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems》
|
2015年
关键词:
integrated logic circuits;
private key cryptography;
DPA-resistance;
IC encryption;
IC lock;
IP piracy;
differential power analysis attack;
key bits;
logic encryption security analysis;
random-logic encryption technique;
reverse engineering attacks;
secret key;
side-channel attack;
strong logic encryption technique;
Algorithm design and analysis;
Benchmark testing;
Encryption;
IP networks;
Integrated circuits;
Reverse engineering;
13.
On enhancing the debug architecture of a system-on-chip (SoC) to detect software attacks
机译:
增强片上系统(SoC)的调试体系结构以检测软件攻击
作者:
Backer Jerry
;
Hely David
;
Karri Ramesh
会议名称:
《2015 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems》
|
2015年
关键词:
computer debugging;
logic circuits;
system-on-chip;
IP cores;
SoC debug architecture enhancement;
area overheads;
attack detection;
hardware components;
intellectual property cores;
internal logic;
low-cost processor core;
power overheads;
runtime software execution;
security monitoring;
software attack detection;
software execution model;
software execution monitoring;
software observability;
system-on-chip;
trusted kernel process;
IP networks;
Instruments;
Monitoring;
Registers;
Software;
Table lookup;
14.
Dependable real-time task execution scheme for a many-core platform
机译:
多核平台的可靠实时任务执行方案
作者:
Yoneda Tomohiro
;
Imai Masashi
;
Saito Hiroshi
;
Kise Kenji
会议名称:
《2015 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems》
|
2015年
关键词:
multiprocessing systems;
reliability;
dependable real-time task execution scheme;
many-core platform;
redundant processor cores;
reliability;
temporary TMR;
Actuators;
Fault tolerant systems;
Hardware;
Redundancy;
Tunneling magnetoresistance;
Automotive applications;
Duplicated task execution;
Pair reconfiguration;
Temporary TMR execution;
15.
SEU sensitivity and modeling using pico-second pulsed laser stimulation of a D Flip-Flop in 40 nm CMOS technology
机译:
在40 nm CMOS技术中使用皮秒触发器的皮秒脉冲激光刺激进行SEU灵敏度和建模
作者:
Champeix Clement
;
Borrel Nicolas
;
Dutertre Jean-Max
;
Robisson Bruno
;
Lisart Mathieu
;
Sarafianos Alexandre
会议名称:
《2015 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems》
|
2015年
关键词:
CMOS digital integrated circuits;
flip-flops;
logic gates;
radiation hardening (electronics);
sensitivity analysis;
CMOS technology;
D flip-flop;
SEU sensitivity;
complementary metal oxide semiconductor;
complex integrated circuit;
laser fault sensitivity mapping;
laser interaction;
laser pulse duration;
laser-sensitive area;
logic gate;
picosecond pulsed laser stimulation;
silicon interaction;
single event upset;
size 40 nm;
Flip-flops;
Integrated circuit modeling;
Junctions;
Latches;
Photoconductivity;
Semiconductor;
16.
A cross-layer approach to online adaptive reliability prediction of transient faults
机译:
暂态故障在线自适应可靠性预测的跨层方法
作者:
Farahani Bahar
;
Safari Saeed
会议名称:
《2015 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems》
|
2015年
关键词:
fault diagnosis;
fault tolerance;
learning (artificial intelligence);
radiation hardening (electronics);
semiconductor industry;
transient analysis;
AVF;
PVTA variation;
SPEC2000 benchmark;
abstraction layer;
architectural vulnerability factor;
cross-layer approach;
cross-layer reliability prediction;
fault tolerant technique;
learning algorithm;
online adaptive reliability prediction;
process voltage temperature and aging variation;
semiconductor industry;
soft error;
transient fault;
Circuit faults;
Predictive mod;
17.
Evaluating the impact of spike and flicker noise in phase change memories
机译:
评估相变存储器中尖峰和闪烁噪声的影响
作者:
Junsangsri Salin
;
Lombardi Fabrizio
;
Jie Han
会议名称:
《2015 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems》
|
2015年
关键词:
circuit simulation;
flicker noise;
phase change memories;
HSPICE simulation;
array-level;
binary PCM memories;
cell-level;
flicker noise impact evaluation;
memory cell;
phase change memories;
simulation-based analysis;
spike noise impact evaluation;
state switching phenomena;
1f noise;
Arrays;
MOSFET;
Phase change materials;
Resistance;
Switches;
Flicker noise;
Frequency;
Phase Change Memory (PCM);
Resistance;
Spike noise;
18.
Impact of test compression on power supply noise control
机译:
测试压缩对电源噪声控制的影响
作者:
Tengteng Zhang
;
Walker D.M.H.
会议名称:
《2015 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems》
|
2015年
关键词:
interference suppression;
power supplies to apparatus;
EDT;
PSN control algorithm;
compression constraints;
embedded deterministic test;
power supply noise control;
test compression;
Decision support systems;
Discrete Fourier transforms;
Fault tolerance;
Fault tolerant systems;
Nanotechnology;
Very large scale integration;
power supply noise;
test compaction/compression;
19.
Improving X-tolerant combinational output compaction via input rotation
机译:
通过输入旋转改善耐X的组合输出压缩
作者:
Bawa Asad Amin
;
Touba Nur A.
会议名称:
《2015 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems》
|
2015年
关键词:
combinational circuits;
fault diagnosis;
X density;
X masking approach;
X-tolerant combinational output compaction;
combinational linear compactor;
combinational rotator;
faults detection;
input rotation;
linear decompressor;
scan chain;
shift distance;
test pattern;
Circuit faults;
Compaction;
Design automation;
Discrete Fourier transforms;
Fans;
Observability;
Very large scale integration;
20.
A configurable board-level adaptive incremental diagnosis technique based on decision trees
机译:
基于决策树的可配置板级自适应增量诊断技术
作者:
Bolchini Cristiana
;
Cassano Luca
会议名称:
《2015 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems》
|
2015年
关键词:
decision trees;
printed circuit testing;
printed circuits;
board-level adaptive incremental diagnosis technique;
configurable early stop condition;
decision tree;
diagnosis accuracy;
electronic board;
Accuracy;
Data mining;
Decision trees;
Engines;
Fault diagnosis;
Measurement;
Nickel;
Adaptive Diagnosis;
Decision Trees;
Functional Diagnosis;
Incremental Diagnosis;
Machine Learning;
21.
Enhancing embedded SRAM security and error tolerance with hardware CRC and obfuscation
机译:
通过硬件CRC和混淆提高嵌入式SRAM的安全性和容错性
作者:
Senwen Kan
;
Ottavi Marco
;
Dworak Jennifer
会议名称:
《2015 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems》
|
2015年
关键词:
SRAM chips;
cyclic redundancy check codes;
integrated circuit reliability;
invasive software;
radiation hardening (electronics);
SRAM soft error reliability;
cyclic redundancy codes;
embedded SRAM security;
error tolerance;
hardware CRC;
hardware Trojan;
hardware obfuscation;
production-worthy silicon development environment;
simulation data;
soft error detection;
Encoding;
Error correction codes;
Hardware;
Polynomials;
Random access memory;
Trojan horses;
22.
Low-overhead fault-tolerance for the preconditioned conjugate gradient solver
机译:
预处理共轭梯度求解器的低开销容错
作者:
Scholl Alexander
;
Braun Claus
;
Kochte Michael A.
;
Wunderlich Hans-Joachim
会议名称:
《2015 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems》
|
2015年
关键词:
CMOS integrated circuits;
conjugate gradient methods;
error correction;
error detection;
fault tolerance;
iterative methods;
transient analysis;
PCG method;
complementary metal oxide semiconductor;
compute-intensive application;
error correction;
error detection method;
heterogeneous computer architecture;
iterative approach;
linear system solver;
low-overhead fault-tolerance;
nanoscaled CMOS device;
particle radiation;
preconditioned conjugate gradient solver;
runtime overhead;
silent data corruption;
transient eff;
23.
Low-power LDPC decoder design exploiting memory error statistics
机译:
利用存储器错误统计信息的低功耗LDPC解码器设计
作者:
Junlin Chen
;
Lei Wang
会议名称:
《2015 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems》
|
2015年
关键词:
error statistics;
parity check codes;
LDPC decoder technique;
algorithmic error tolerance capability;
decoding performance;
error sensitivity;
low power LDPC decoder design;
memory bits;
memory error statistics;
memory locations;
memory power consumption;
scaled supply voltage;
voltage scaling;
Bit error rate;
Decoding;
Iterative decoding;
Memory management;
Power demand;
LDPC decoders;
error sensitivity;
low power design;
memory errors;
24.
Predictive LBIST model and partial ATPG for seed extraction
机译:
预测性LBIST模型和部分ATPG用于种子提取
作者:
Contreras G.
;
Ahmed N.
;
Winemberg L.
;
Tehranipoor M.
会议名称:
《2015 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems》
|
2015年
关键词:
automatic test pattern generation;
built-in self test;
fault diagnosis;
integrated circuit reliability;
integrated circuit testing;
logic gates;
logic testing;
area overhead;
deterministic BIST;
deterministic seed;
fault detection;
high test coverage;
integrated circuit;
linear XOR model;
logic built-in self-test;
nonvolatile memory;
partial ATPG pattern;
predictive LBIST model;
reliability application;
seed extraction;
test point insertion;
Algorithm design and analysis;
Automatic test pattern generation;
Circuit fau;
25.
Reducing the performance overhead of resilient CMPs with substitutable resources
机译:
使用可替代资源减少弹性CMP的性能开销
作者:
Malek A.
;
Tzilis S.
;
Khan D.A.
;
Sourdis I.
;
Smaragdos G.
;
Strydis C.
会议名称:
《2015 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems》
|
2015年
关键词:
clocks;
integrated circuit interconnections;
microprocessor chips;
multiprocessing systems;
adaptive 4-core CMP design;
baseline processor;
chip multiprocessors;
execution cycles constant;
performance overhead reduction;
processor configuration;
reconfigurable interconnect pipelining;
resilient CMP;
scaling down operating frequency;
slower clock;
substitutable pipeline stages;
substitutable resources;
Benchmark testing;
Clocks;
Delays;
Pipeline processing;
Pipelines;
Program processors;
Registers;
26.
Reliable hash trees for post-quantum stateless cryptographic hash-based signatures
机译:
可靠的哈希树,用于基于量子后无状态加密的哈希签名
作者:
Mozaffari-Kermani Mehran
;
Azarderakhsh Reza
会议名称:
《》
|
2015年
关键词:
error detection;
fault diagnosis;
private key cryptography;
Shor algorithm;
code-based cryptography;
error detection post-quantum cryptographic architecture;
fault diagnosis methods;
hash function;
lattice-based cryptography;
multivariate-quadratic-equation;
post-quantum stateless cryptographic hash-based signature;
quantum-computer discrete-logarithm algorithm;
reliable hash tree;
secret-key cryptography;
Computer architecture;
Cryptography;
Hardware;
Reliability;
Transient analysis;
Vegetation;
Error detection;
ha;
27.
A method to protect Bloom filters from soft errors
机译:
一种防止Bloom过滤器遭受软错误的方法
作者:
Reviriego Pedro
;
Pontarelli Salvatore
;
Maestro Juan Antonio
;
Ottavi Marco
会议名称:
《2015 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems》
|
2015年
关键词:
Hamming codes;
data privacy;
data structures;
error correction codes;
radiation hardening (electronics);
bloom filter;
content protection;
error correction code;
error protection;
hamming ECC;
reliability;
soft error;
Arrays;
Decoding;
Delays;
Error correction codes;
Fault tolerance;
Fault tolerant systems;
Very large scale integration;
Bloom filters;
Error correction;
Soft errors;
28.
Using value similarity of registers for soft error mitigation
机译:
使用寄存器的值相似性来减轻软错误
作者:
Eker Abdulaziz
;
Ergin Oguz
会议名称:
《2015 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems》
|
2015年
关键词:
error correction;
flip-flops;
radiation hardening (electronics);
redundancy;
Hamming distance;
cosmic particle;
data holding component;
microprocessor;
out-of-order superscalar pipeline;
packaging material radiation;
parity protection;
redundancy;
register file;
register value similarity;
soft error correction scheme;
soft error mitigation;
Decision support systems;
Discrete Fourier transforms;
Fault tolerance;
Fault tolerant systems;
Nanotechnology;
Very large scale integration;
microprocessor architecture;
registerf;
29.
Adaptive fault simulation on many-core microprocessor systems
机译:
多核微处理器系统上的自适应故障仿真
作者:
Haghbayan Mohammad-Hashem
;
Teravainen Sami
;
Rahmani Amir-Mohammad
;
Liljeberg Pasi
;
Tenhunen Hannu
会议名称:
《2015 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems》
|
2015年
关键词:
fault simulation;
microcomputers;
network-on-chip;
parallel processing;
resource allocation;
shared memory systems;
Intel single-chip cloud computer;
adaptive fault simulation;
load balancing;
network-on-chip-based manycore microprocessor;
off-chip shared memory access;
parallel fault simulation method;
Adaptation models;
Circuit faults;
Discrete Fourier transforms;
Observability;
Random access memory;
Very large scale integration;
Fault Simulation;
Intel Single-chip Cloud Computer;
Load Balancing;
Many-Core Systems;
30.
Accelerated microarchitectural Fault Injection-based reliability assessment
机译:
基于加速微体系结构故障注入的可靠性评估
作者:
Kaliorakis Manolis
;
Tselonis Sotiris
;
Chatzidimitriou Athanasios
;
Gizopoulos Dimitris
会议名称:
《2015 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems》
|
2015年
关键词:
fault diagnosis;
performance evaluation;
reliability;
statistical analysis;
RTL fault injector;
accelerated microarchitectural fault injection;
performance evolution;
reliability assessment;
reliability estimation;
rendering;
statistical fault injection;
vulnerability measurement;
x86-64 out-of-order architecture;
Accuracy;
Benchmark testing;
Circuit faults;
Estimation;
Microarchitecture;
Registers;
Reliability;
early reliability evaluation;
microarchitectural simulators;
microprocessors;
statistical fault injection;
31.
Scan attack on Elliptic Curve Cryptosystem
机译:
对椭圆曲线密码系统的扫描攻击
作者:
Ali Sk Subidh
;
Sinanoglu Ozgur
会议名称:
《2015 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems》
|
2015年
关键词:
design for testability;
public key cryptography;
tree searching;
DfT infrastructure;
ECC;
bit-flip analysis;
depth-first search fashion;
design for testability;
elliptic curve cryptosystem;
hardware design;
internal registers;
mode-reset countermeasure;
multiple internal registers;
representative public key cipher;
scalar multiplication registers;
scan attack;
secret key;
test mode;
Ciphers;
Elliptic curve cryptography;
Elliptic curves;
Registers;
32.
Compacting output responses containing unknowns using an embedded processor
机译:
使用嵌入式处理器压缩包含未知的输出响应
作者:
Saleem Kamran
;
Muthyala Sreenivaas S.
;
Touba Nur A.
会议名称:
《2015 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems》
|
2015年
关键词:
embedded systems;
integrated circuit design;
software engineering;
system-on-chip;
MISR;
SoC designs;
arithmetic operations;
embedded processor;
low cost partial X-masking step;
mask data;
multiinput signature register;
signature analysis;
software-based test;
system-on-chip;
Clocks;
Decision support systems;
Discrete Fourier transforms;
Fault tolerance;
Fault tolerant systems;
Nanotechnology;
Very large scale integration;
33.
Quest for a quantum search algorithm for testing stuck-at faults in digital circuits
机译:
寻求用于测试数字电路中卡住故障的量子搜索算法
作者:
Venkatasubramanian Muralidharan
;
Agrawal Vishwani D.
;
Janaher James J.
会议名称:
《2015 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems》
|
2015年
关键词:
fault diagnosis;
logic testing;
optimisation;
search problems;
NP-complete;
digital circuit testing;
quantum search algorithm;
random test generator;
stuck-at fault testing;
vector space;
Algorithm design and analysis;
Benchmark testing;
Circuit faults;
Computers;
Quantum computing;
Very large scale integration;
34.
A CMOS ripple detector for integrated voltage regulator testing
机译:
用于集成稳压器测试的CMOS纹波检测器
作者:
Ozmen Cagatay
;
Dirican Aydin
;
Tan Nurettin
;
Hieu Nguyen
;
Margala Martin
会议名称:
《2015 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems》
|
2015年
关键词:
CMOS integrated circuits;
comparators (circuits);
electric sensing devices;
integrated circuit design;
voltage regulators;
CMOS ripple detector;
Cadence Virtuoso simulation environment;
DC signal;
IBM CMOS technology;
RMS-based ripple sensor;
bandwidth 220 MHz;
clocked comparator;
digital pass-fail signal;
fully-integrated voltage regulators;
input ripple amplitude;
integrated voltage regulator testing;
peak-to-peak ripple voltage detection;
size 90 nm;
supply rail;
voltage 1.2 V;
Decision support systems;
Discrete;
35.
A Dual-Layer Fault Manager for systems based on Xilinx Virtex FPGAs
机译:
基于Xilinx Virtex FPGA的系统的双层故障管理器
作者:
Herrera-Alzu I.
;
Lopez-Vallejo M.
;
Gil Soriano C.
会议名称:
《2015 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems》
|
2015年
关键词:
SRAM chips;
fault diagnosis;
field programmable gate arrays;
radiation hardening (electronics);
redundancy;
SRAM technology;
Xilinx Virtex FPGA;
dual-layer fault manager;
dynamic reconfiguration capability;
field programmable gate array;
ionizing radiation;
logic density;
rad-hard technology;
redundancy level;
static random access memory;
Circuit faults;
Fault tolerant systems;
Field programmable gate arrays;
Monitoring;
Phase change materials;
Redundancy;
36.
A non-conservative software-based approach for detecting illegal CFEs caused by transient faults
机译:
一种基于软件的非保守方法,用于检测由瞬态故障引起的非法CFE
作者:
Rodrigues Diego
;
Nazarian Ghazaleh
;
Moreira Alvaro
;
Carro Luigi
;
Gaydadjiev Georgi
会议名称:
《2015 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems》
|
2015年
关键词:
program control structures;
program diagnostics;
software fault tolerance;
LLVM framework;
control-flow error detection;
extensive fault injection campaign;
illegal CFEs detection;
nonconservative software-based approach;
program transformation;
single-bit flips;
static analysis;
transient faults;
Assembly;
Benchmark testing;
Circuit faults;
Operating systems;
Program processors;
Systematics;
Transient analysis;
Fault tolerance;
Reliability;
availability;
serviceability;
37.
Towards reliability and performance-aware Wireless Network-on-Chip design
机译:
迈向可靠性和性能感知的无线片上网络设计
作者:
Agyeman Michael Opoku
;
Kin-Fai Tong
;
Mak Terrence
会议名称:
《2015 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems》
|
2015年
关键词:
conductors (electric);
dielectric materials;
error statistics;
integrated circuit interconnections;
integrated circuit reliability;
network-on-chip;
SoC;
WiNoC reliability;
communication fabric;
dielectric material;
efficiency 10.7 percent;
efficiency 13.8 percent;
efficiency 21.4 percent;
error rate;
frequency 60 GHz;
hybrid wired-wireless network-on-chip;
performance-aware wireless network-on-chip design;
surface wave signal;
system-on-chip;
thin metal conductor;
transducer;
wireless interconnect fabric;
wireline c;
38.
Fault detection and repair of DSC arrays through memristor sensing
机译:
通过忆阻器检测DSC阵列的故障检测和修复
作者:
Mathew J.
;
Yang Y.
;
Ottavi M.
;
Brown T.
;
Zampetti A.
;
Di Carlo A.
;
Jabir A.M.
;
Pradhan D.K.
会议名称:
《2015 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems》
|
2015年
关键词:
fault diagnosis;
memristors;
search problems;
solar cell arrays;
DSC arrays repair;
SPICE simulation;
fault detection;
fault tolerant design;
fault tolerant photovoltaic array;
green energy system;
high energy-conversion efficiency;
low-cost photovoltaic technology;
memristor sensing;
photovoltaic cells dye solar cell;
search algorithm;
Circuit faults;
Fault detection;
Fault tolerance;
Maintenance engineering;
Memristors;
Photovoltaic cells;
Sensors;
39.
Single Event Upsets and Hot Pixels in digital imagers
机译:
数字成像仪中的单事件翻转和热像素
作者:
Chapman Glenn H.
;
Thomas Rahul
;
Thomas Rohan
;
Coelho Silva Meneses Klinsmann J.
;
Yang Tommy Q.
;
Koren Israel
;
Koren Zahava
会议名称:
《2015 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems》
|
2015年
关键词:
image sensors;
radiation hardening (electronics);
SEU rate;
dark image;
digital imagers;
hot pixels;
occurrence rate;
permanent fault rates;
single event upsets;
Cameras;
Digital images;
ISO;
ISO Standards;
Lighting;
Single event upsets;
APS;
CCD;
ISO;
SEU;
active pixel sensor;
hot pixel;
imager defects;
40.
Characterization of low power radiation-hard reed-solomon code protected serializers in 65-nm for HEP experiments electronics
机译:
用于HEP实验电子产品的65纳米低功率辐射-硬-里德-所罗门代码保护串行器的特性
作者:
Felici Daniele
;
Bonacini Sandro
;
Ottavi Marco
会议名称:
《2015 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems》
|
2015年
关键词:
Reed-Solomon codes;
detector circuits;
error statistics;
low-power electronics;
radiation hardening (electronics);
HEP experiment electronics;
Reed-Solomon code protected serializer;
SEU sensitivity;
bit error rate;
bit rate 4.8 Gbit/s;
hardware redundancy;
high energy physics;
low power radiation-hard serializer;
modern detector;
power consumption;
radiation effect;
radiation-resistant component;
simple TMR;
single event upset;
size 65 nm;
total ionizing dose;
triple modular redundancy;
Generators;
Large Hadron Colli;
41.
Influence of triple-well technology on laser fault injection and laser sensor efficiency
机译:
三阱技术对激光故障注入和激光传感器效率的影响
作者:
Borrel N.
;
Champeix C.
;
Kussener E.
;
Rahajandraibe W.
;
Lisart M.
;
Sarafianos A.
;
Dutertre J.-M.
会议名称:
《2015 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems》
|
2015年
关键词:
CMOS integrated circuits;
electric sensing devices;
radiation hardening (electronics);
BBICS;
CMOS technology;
SEE;
body-biasing adjustments;
bulk built-in current sensors;
countermeasures sensors;
deep-Nwell implant;
dual-well technology;
integrated circuit sensitivity;
laser sensor efficiency;
laser-induced fault injections;
registers;
single event effects;
single-event response;
size 40 nm;
size 90 nm;
soft error rate;
triple well technology;
CMOS integrated circuits;
Circuit faults;
MOS devices;
Monitoring;
Photocon;
42.
IntelliCAN: Attack-resilient Controller Area Network (CAN) for secure automobiles
机译:
IntelliCAN:安全汽车的防攻击控制器局域网(CAN)
作者:
Ansari Mohammad Raashid
;
Shucheng Yu
;
Qiaoyan Yu
会议名称:
《2015 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems》
|
2015年
关键词:
automobiles;
computer network security;
controller area networks;
mechanical engineering computing;
CAN protocols;
IntelliCAN;
attack-resilient controller area network;
error detection;
Discrete Fourier transforms;
Fault tolerance;
Fault tolerant systems;
Nanotechnology;
Very large scale integration;
Automobile;
controller area network(CAN);
error detection;
hardware security;
masquerade attack;
security;
43.
Chip-level anti-reverse engineering using transformable interconnects
机译:
使用可转换互连的芯片级防反向工程
作者:
Shuai Chen
;
Junlin Chen
;
Forte Domenic
;
Jia Di
;
Tehranipoor Mark
;
Lei Wang
会议名称:
《2015 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems》
|
2015年
关键词:
integrated circuit interconnections;
integrated circuit packaging;
reverse engineering;
semiconductor industry;
chip package;
chip reverse engineering;
chip-level antireverse engineering;
electrical property;
gain access;
integrated circuit cloning;
low-cost delaying processing;
semiconductor industry;
transformable IC technology;
transformable interconnect;
Complexity theory;
Correlation;
Integrated circuit interconnections;
Logic gates;
Reverse engineering;
Timing;
44.
Characterization of low power radiation-hard reed-solomon code protected serializers in 65-nm for HEP experiments electronics
机译:
低功率辐射硬芦苇型索非通码的特征在65纳米的HEP实验电子中受保护的序列剂
作者:
Felici Daniele
;
Bonacini Sandro
;
Ottavi Marco
会议名称:
《2015 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems》
|
2015年
关键词:
Reed-Solomon codes;
detector circuits;
error statistics;
low-power electronics;
radiation hardening (electronics);
HEP experiment electronics;
Reed-Solomon code protected serializer;
SEU sensitivity;
bit error rate;
bit rate 4.8 Gbit/s;
hardware redundancy;
high energy physics;
low power radiation-hard serializer;
modern detector;
power consumption;
radiation effect;
radiation-resistant component;
simple TMR;
single event upset;
size 65 nm;
total ionizing dose;
triple modular redundancy;
Generators;
Large Hadron Collider;
Power demand;
Radiation effects;
Robustness;
Shift registers;
Tunneling magnetoresistance;
45.
A fast and scalable fault injection framework to evaluate multi/many-core soft error reliability
机译:
快速可扩展的故障注入框架,可评估多/多核软误差可靠性
作者:
Rosa Felipe
;
Kastensmidt Fernanda
;
Reis Ricardo
;
Ost Luciano
会议名称:
《2015 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems》
|
2015年
关键词:
embedded systems;
multiprocessing systems;
parallel processing;
performance evaluation;
ARM processor;
MIPS;
OVPSim-FIM;
RTOS;
chip power density;
manycore soft error reliability;
multicore soft error reliability;
multiprocessor embedded system;
scalable fault injection framework;
simulation-based fault injection framework;
Benchmark testing;
Context;
Context modeling;
Monitoring;
Operating systems;
Program processors;
Registers;
46.
A BIST approach for counterfeit circuit detection based on NBTI degradation
机译:
基于NBTI劣化的假冒电路检测BIST方法
作者:
Savanur Puneet Ramesh
;
Alladi Phaninder
;
Tragoudas Spyros
会议名称:
《2015 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems》
|
2015年
关键词:
ageing;
built-in self test;
negative bias temperature instability;
BIST approach;
HSPICE simulation;
NBTI aging factor;
NBTI degradation;
aging delay;
built-in-self-test;
counterfeit circuit detection;
negative bias temperature instability;
size 45 nm;
size 65 nm;
Accuracy;
Aging;
Benchmark testing;
Built-in self-test;
Delays;
Logic gates;
Stress;
47.
Exploring error-tolerant low-power multiple-output read scheme for memristor-based memory arrays
机译:
探索基于Memristor的内存阵列的耐堵塞低功耗多输出读取方案
作者:
Adeyemo Adedotun A.
;
Mathew Jimson
;
Jabir Abusaleh M.
;
Pradhan Dhiraj K.
会议名称:
《2015 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems》
|
2015年
关键词:
memristor circuits;
power consumption;
readout electronics;
resistive RAM;
I-H architecture;
ReRAM;
closed form expression;
energy consumption reduction;
error-tolerant low-power multiple-output read scheme;
inverted-Hamming architecture;
memory technology;
memristor-based memory array;
multiple-cell readout method;
noise margin effect;
power consumption;
read-write scheme;
resistive random access memory;
single-bit write error;
sneak-path prone crossbar architecture;
zero sneak-path;
Analytical models;
Arrays;
Encoding;
Integrated circuit modeling;
Memristors;
Resistance;
48.
IntelliCAN: Attack-resilient Controller Area Network (CAN) for secure automobiles
机译:
Intellican:用于安全汽车的攻击弹性控制器区域网络(CAN)
作者:
Ansari Mohammad Raashid
;
Shucheng Yu
;
Qiaoyan Yu
会议名称:
《2015 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems》
|
2015年
关键词:
automobiles;
computer network security;
controller area networks;
mechanical engineering computing;
CAN protocols;
IntelliCAN;
attack-resilient controller area network;
error detection;
Discrete Fourier transforms;
Fault tolerance;
Fault tolerant systems;
Nanotechnology;
Very large scale integration;
Automobile;
controller area network(CAN);
error detection;
hardware security;
masquerade attack;
security;
49.
A CMOS ripple detector for integrated voltage regulator testing
机译:
用于集成电压调节器测试的CMOS纹波检测器
作者:
Ozmen Cagatay
;
Dirican Aydin
;
Tan Nurettin
;
Hieu Nguyen
;
Margala Martin
会议名称:
《2015 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems》
|
2015年
关键词:
CMOS integrated circuits;
comparators (circuits);
electric sensing devices;
integrated circuit design;
voltage regulators;
CMOS ripple detector;
Cadence Virtuoso simulation environment;
DC signal;
IBM CMOS technology;
RMS-based ripple sensor;
bandwidth 220 MHz;
clocked comparator;
digital pass-fail signal;
fully-integrated voltage regulators;
input ripple amplitude;
integrated voltage regulator testing;
peak-to-peak ripple voltage detection;
size 90 nm;
supply rail;
voltage 1.2 V;
Decision support systems;
Discrete Fourier transforms;
Fault tolerance;
Fault tolerant systems;
Hafnium;
Nanotechnology;
Very large scale integration;
built-in self-test;
power management;
sensor;
supply ripple;
testing;
voltage regulator;
50.
Approximate compressors for error-resilient multiplier design
机译:
近似压缩机,用于错误弹性倍增器设计
作者:
Zhixi Yang
;
Jie Han
;
Lombardi Fabrizio
会议名称:
《2015 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems》
|
2015年
关键词:
approximation theory;
integrated circuit design;
multiplying circuits;
PPR;
approximate circuit design;
approximate compressor;
approximate multiplier design;
error-resilient image;
error-resilient multiplier design;
image sharpening algorithm;
multiplication;
partial product reduction;
signal processing application;
signal-to-noise ratio;
Accuracy;
Adders;
Approximation algorithms;
Approximation methods;
Compressors;
Delays;
Signal to noise ratio;
Approximate circuit design;
Compressor;
Multiplier;
51.
A Dual-Layer Fault Manager for systems based on Xilinx Virtex FPGAs
机译:
基于Xilinx Virtex FPGA的系统的双层故障管理器
作者:
Herrera-Alzu I.
;
Lopez-Vallejo M.
;
Gil Soriano C.
会议名称:
《2015 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems》
|
2015年
关键词:
SRAM chips;
fault diagnosis;
field programmable gate arrays;
radiation hardening (electronics);
redundancy;
SRAM technology;
Xilinx Virtex FPGA;
dual-layer fault manager;
dynamic reconfiguration capability;
field programmable gate array;
ionizing radiation;
logic density;
rad-hard technology;
redundancy level;
static random access memory;
Circuit faults;
Fault tolerant systems;
Field programmable gate arrays;
Monitoring;
Phase change materials;
Redundancy;
52.
Hot spare components for performance-cost improvement in multi-core SIMT
机译:
用于多核模拟的性能成本的热备件
作者:
Mozafari S. Hasan
;
Meyer Brett H.
会议名称:
《2015 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems》
|
2015年
关键词:
cost reduction;
instruction sets;
multiprocessing systems;
performance evaluation;
cost reduction;
hot spare components;
multicore SIMT;
multicore single-instruction multiple-thread processor;
performance-cost improvement;
redundant components;
Benchmark testing;
Context;
Degradation;
Delays;
Multicore processing;
Program processors;
Redundancy;
53.
Predictive LBIST model and partial ATPG for seed extraction
机译:
用于种子提取的预测Lbist模型和部分ATPG
作者:
Contreras G.
;
Ahmed N.
;
Winemberg L.
;
Tehranipoor M.
会议名称:
《2015 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems》
|
2015年
关键词:
automatic test pattern generation;
built-in self test;
fault diagnosis;
integrated circuit reliability;
integrated circuit testing;
logic gates;
logic testing;
area overhead;
deterministic BIST;
deterministic seed;
fault detection;
high test coverage;
integrated circuit;
linear XOR model;
logic built-in self-test;
nonvolatile memory;
partial ATPG pattern;
predictive LBIST model;
reliability application;
seed extraction;
test point insertion;
Algorithm design and analysis;
Automatic test pattern generation;
Circuit faults;
Complexity theory;
Mathematical model;
Phase shifters;
Polynomials;
54.
RotR: Rotational redundant task mapping for fail-operational MPSoCs
机译:
ROTR:失败运营MPSOC的旋转冗余任务映射
作者:
Nahar Badrun
;
Meyer Brett H.
会议名称:
《2015 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems》
|
2015年
关键词:
performance evaluation;
redundancy;
system-on-chip;
DMR system;
RotR mapping;
TMR system;
active-redundancy-based system;
fail-operational MPSoC;
reliability;
rotational redundant task mapping;
safety-critical application;
system redundancy state;
Computer architecture;
Fault tolerant systems;
Redundancy;
Transient analysis;
Tunneling magnetoresistance;
55.
Dependable real-time task execution scheme for a many-core platform
机译:
用于许多核心平台的可靠实时任务执行方案
作者:
Yoneda Tomohiro
;
Imai Masashi
;
Saito Hiroshi
;
Kise Kenji
会议名称:
《2015 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems》
|
2015年
关键词:
multiprocessing systems;
reliability;
dependable real-time task execution scheme;
many-core platform;
redundant processor cores;
reliability;
temporary TMR;
Actuators;
Fault tolerant systems;
Hardware;
Redundancy;
Tunneling magnetoresistance;
Automotive applications;
Duplicated task execution;
Pair reconfiguration;
Temporary TMR execution;
56.
Enhancing embedded SRAM security and error tolerance with hardware CRC and obfuscation
机译:
使用硬件CRC增强嵌入式SRAM安全性和错误容忍度
作者:
Senwen Kan
;
Ottavi Marco
;
Dworak Jennifer
会议名称:
《2015 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems》
|
2015年
关键词:
SRAM chips;
cyclic redundancy check codes;
integrated circuit reliability;
invasive software;
radiation hardening (electronics);
SRAM soft error reliability;
cyclic redundancy codes;
embedded SRAM security;
error tolerance;
hardware CRC;
hardware Trojan;
hardware obfuscation;
production-worthy silicon development environment;
simulation data;
soft error detection;
Encoding;
Error correction codes;
Hardware;
Polynomials;
Random access memory;
Trojan horses;
57.
Asymmetric ECC organization in 3D-memory via spare column utilization
机译:
通过备用专栏利用率在3D-Memory中的非对称ECC组织
作者:
Hyunseung Han
;
Joon-Sung Yang
会议名称:
《2015 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems》
|
2015年
关键词:
error statistics;
integrated circuit reliability;
integrated memory circuits;
three-dimensional integrated circuits;
3D-IC technology;
3D-memory;
asymmetric ECC organization;
bit-error rate;
die reliability;
processor-memory structure;
spare column utilization;
upper layer memory;
Alpha particles;
Error analysis;
Error correction codes;
Neutrons;
Organizations;
Reliability;
Very large scale integration;
58.
A method to protect Bloom filters from soft errors
机译:
一种保护盛开滤波器免受软错误的方法
作者:
Reviriego Pedro
;
Pontarelli Salvatore
;
Maestro Juan Antonio
;
Ottavi Marco
会议名称:
《2015 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems》
|
2015年
关键词:
Hamming codes;
data privacy;
data structures;
error correction codes;
radiation hardening (electronics);
bloom filter;
content protection;
error correction code;
error protection;
hamming ECC;
reliability;
soft error;
Arrays;
Decoding;
Delays;
Error correction codes;
Fault tolerance;
Fault tolerant systems;
Very large scale integration;
Bloom filters;
Error correction;
Soft errors;
59.
On-line detection of intermittent faults in digital-to-analog converters
机译:
数字到模拟转换器中间歇性故障的在线检测
作者:
Soma Mani
会议名称:
《2015 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems》
|
2015年
关键词:
digital signatures;
digital-analogue conversion;
fault diagnosis;
information theory;
statistical analysis;
DAC;
digital signature;
digital-to-analog converter;
information theory;
internal circuit design;
online intermittent fault detection;
statistical procedure;
Clocks;
Electrical fault detection;
Entropy;
Fault detection;
Hardware;
Histograms;
On-line test;
Testing for analog and mixed circuits;
Transient / soft faults and errors;
60.
Quest for a quantum search algorithm for testing stuck-at faults in digital circuits
机译:
追求量子搜索算法在数字电路中测试卡上的故障
作者:
Venkatasubramanian Muralidharan
;
Agrawal Vishwani D.
;
Janaher James J.
会议名称:
《2015 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems》
|
2015年
关键词:
fault diagnosis;
logic testing;
optimisation;
search problems;
NP-complete;
digital circuit testing;
quantum search algorithm;
random test generator;
stuck-at fault testing;
vector space;
Algorithm design and analysis;
Benchmark testing;
Circuit faults;
Computers;
Quantum computing;
Very large scale integration;
61.
On enhancing the debug architecture of a system-on-chip (SoC) to detect software attacks
机译:
在增强片上系统(SOC)的调试架构上以检测软件攻击
作者:
Backer Jerry
;
Hely David
;
Karri Ramesh
会议名称:
《2015 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems》
|
2015年
关键词:
computer debugging;
logic circuits;
system-on-chip;
IP cores;
SoC debug architecture enhancement;
area overheads;
attack detection;
hardware components;
intellectual property cores;
internal logic;
low-cost processor core;
power overheads;
runtime software execution;
security monitoring;
software attack detection;
software execution model;
software execution monitoring;
software observability;
system-on-chip;
trusted kernel process;
IP networks;
Instruments;
Monitoring;
Registers;
Software;
Table lookup;
62.
A cross-layer approach to online adaptive reliability prediction of transient faults
机译:
在线自适应可靠性预测瞬态断层的跨层方法
作者:
Farahani Bahar
;
Safari Saeed
会议名称:
《2015 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems》
|
2015年
关键词:
fault diagnosis;
fault tolerance;
learning (artificial intelligence);
radiation hardening (electronics);
semiconductor industry;
transient analysis;
AVF;
PVTA variation;
SPEC2000 benchmark;
abstraction layer;
architectural vulnerability factor;
cross-layer approach;
cross-layer reliability prediction;
fault tolerant technique;
learning algorithm;
online adaptive reliability prediction;
process voltage temperature and aging variation;
semiconductor industry;
soft error;
transient fault;
Circuit faults;
Predictive models;
Program processors;
Reliability;
Timing;
Transient analysis;
63.
Using value similarity of registers for soft error mitigation
机译:
使用寄存器的值相似性进行软错误缓解
作者:
Eker Abdulaziz
;
Ergin Oguz
会议名称:
《2015 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems》
|
2015年
关键词:
error correction;
flip-flops;
radiation hardening (electronics);
redundancy;
Hamming distance;
cosmic particle;
data holding component;
microprocessor;
out-of-order superscalar pipeline;
packaging material radiation;
parity protection;
redundancy;
register file;
register value similarity;
soft error correction scheme;
soft error mitigation;
Decision support systems;
Discrete Fourier transforms;
Fault tolerance;
Fault tolerant systems;
Nanotechnology;
Very large scale integration;
microprocessor architecture;
registerfile;
soft error;
64.
Low-overhead fault-tolerance for the preconditioned conjugate gradient solver
机译:
用于预处理共轭梯度求解器的低开销容错
作者:
Scholl Alexander
;
Braun Claus
;
Kochte Michael A.
;
Wunderlich Hans-Joachim
会议名称:
《2015 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems》
|
2015年
关键词:
CMOS integrated circuits;
conjugate gradient methods;
error correction;
error detection;
fault tolerance;
iterative methods;
transient analysis;
PCG method;
complementary metal oxide semiconductor;
compute-intensive application;
error correction;
error detection method;
heterogeneous computer architecture;
iterative approach;
linear system solver;
low-overhead fault-tolerance;
nanoscaled CMOS device;
particle radiation;
preconditioned conjugate gradient solver;
runtime overhead;
silent data corruption;
transient effect;
Approximation methods;
Error correction;
Fault tolerance;
Fault tolerant systems;
Runtime;
Sparse matrices;
Transient analysis;
ABFT;
Fault Tolerance;
Preconditioned Conjugate Gradient;
Sparse Linear System Solving;
65.
A non-conservative software-based approach for detecting illegal CFEs caused by transient faults
机译:
一种用于检测瞬态断层造成的非法CFE的基于非保守的软件方法
作者:
Rodrigues Diego
;
Nazarian Ghazaleh
;
Moreira Alvaro
;
Carro Luigi
;
Gaydadjiev Georgi
会议名称:
《2015 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems》
|
2015年
关键词:
program control structures;
program diagnostics;
software fault tolerance;
LLVM framework;
control-flow error detection;
extensive fault injection campaign;
illegal CFEs detection;
nonconservative software-based approach;
program transformation;
single-bit flips;
static analysis;
transient faults;
Assembly;
Benchmark testing;
Circuit faults;
Operating systems;
Program processors;
Systematics;
Transient analysis;
Fault tolerance;
Reliability;
availability;
serviceability;
66.
Software-based on-chip thermal sensor calibration for DVFS-enabled many-core systems
机译:
基于软件的片上热传感器校准DVFS的许多核心系统
作者:
Teravainen Sami
;
Haghbayan Mohammad-Hashem
;
Rahmani Amir-Mohammad
;
Liljeberg Pasi
;
Tenhunen Hannu
会议名称:
《2015 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems》
|
2015年
关键词:
calibration;
multiprocessing systems;
power aware computing;
DVFS-enabled manycore system;
Intel SCC;
Intel single-chip cloud computer;
current VF level;
current voltage-frequency level;
dynamic voltage-and-frequency scaling;
fine-grained DTM technique;
fine-grained dynamic thermal management technique;
software-based auto-calibration strategy;
software-based on-chip thermal sensor calibration;
temperature gradient;
Calibration;
Radiation detectors;
System-on-chip;
Temperature measurement;
Temperature sensors;
Voltage measurement;
Intel Single-chip Cloud Computer;
Many-Core Systems;
Thermal Calibration;
67.
Reliable hash trees for post-quantum stateless cryptographic hash-based signatures
机译:
基于Quantum无状态Cryptography哈希签名的可靠哈希树
作者:
Mozaffari-Kermani Mehran
;
Azarderakhsh Reza
会议名称:
《2015 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems》
|
2015年
关键词:
error detection;
fault diagnosis;
private key cryptography;
Shor algorithm;
code-based cryptography;
error detection post-quantum cryptographic architecture;
fault diagnosis methods;
hash function;
lattice-based cryptography;
multivariate-quadratic-equation;
post-quantum stateless cryptographic hash-based signature;
quantum-computer discrete-logarithm algorithm;
reliable hash tree;
secret-key cryptography;
Computer architecture;
Cryptography;
Hardware;
Reliability;
Transient analysis;
Vegetation;
Error detection;
hash-based signatures;
postquantum cryptography;
reliability;
68.
A configurable board-level adaptive incremental diagnosis technique based on decision trees
机译:
基于决策树的可配置的电路板级自适应增量诊断技术
作者:
Bolchini Cristiana
;
Cassano Luca
会议名称:
《2015 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems》
|
2015年
关键词:
decision trees;
printed circuit testing;
printed circuits;
board-level adaptive incremental diagnosis technique;
configurable early stop condition;
decision tree;
diagnosis accuracy;
electronic board;
Accuracy;
Data mining;
Decision trees;
Engines;
Fault diagnosis;
Measurement;
Nickel;
Adaptive Diagnosis;
Decision Trees;
Functional Diagnosis;
Incremental Diagnosis;
Machine Learning;
69.
Improving X-tolerant combinational output compaction via input rotation
机译:
通过输入旋转提高X耐受组合输出压实
作者:
Bawa Asad Amin
;
Touba Nur A.
会议名称:
《2015 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems》
|
2015年
关键词:
combinational circuits;
fault diagnosis;
X density;
X masking approach;
X-tolerant combinational output compaction;
combinational linear compactor;
combinational rotator;
faults detection;
input rotation;
linear decompressor;
scan chain;
shift distance;
test pattern;
Circuit faults;
Compaction;
Design automation;
Discrete Fourier transforms;
Fans;
Observability;
Very large scale integration;
70.
Adaptive fault simulation on many-core microprocessor systems
机译:
许多核心微处理器系统的自适应故障仿真
作者:
Haghbayan Mohammad-Hashem
;
Teravainen Sami
;
Rahmani Amir-Mohammad
;
Liljeberg Pasi
;
Tenhunen Hannu
会议名称:
《2015 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems》
|
2015年
关键词:
fault simulation;
microcomputers;
network-on-chip;
parallel processing;
resource allocation;
shared memory systems;
Intel single-chip cloud computer;
adaptive fault simulation;
load balancing;
network-on-chip-based manycore microprocessor;
off-chip shared memory access;
parallel fault simulation method;
Adaptation models;
Circuit faults;
Discrete Fourier transforms;
Observability;
Random access memory;
Very large scale integration;
Fault Simulation;
Intel Single-chip Cloud Computer;
Load Balancing;
Many-Core Systems;
71.
REPAIR: Hard-error recovery via re-execution
机译:
修复:通过重新执行硬错误恢复
作者:
Soman Jyothish
;
Miralaei Negar
;
Mycroft Alan
;
Jones Timothy M.
会议名称:
《2015 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems》
|
2015年
关键词:
error analysis;
fault tolerance;
integrated circuit reliability;
integrated circuit testing;
IRU;
REPAIR;
fault tolerance;
hard-error recovery;
instruction reexecution unit;
parametric variation;
permanent fault;
processor reliability;
recovery from errors in processors by allowing instruction re-execution;
transistor wearout;
Arrays;
Benchmark testing;
Maintenance engineering;
Multicore processing;
Pipelines;
Redundancy;
Registers;
72.
Scan attack on Elliptic Curve Cryptosystem
机译:
扫描攻击椭圆曲线密码系统
作者:
Ali Sk Subidh
;
Sinanoglu Ozgur
会议名称:
《2015 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems》
|
2015年
关键词:
design for testability;
public key cryptography;
tree searching;
DfT infrastructure;
ECC;
bit-flip analysis;
depth-first search fashion;
design for testability;
elliptic curve cryptosystem;
hardware design;
internal registers;
mode-reset countermeasure;
multiple internal registers;
representative public key cipher;
scalar multiplication registers;
scan attack;
secret key;
test mode;
Ciphers;
Elliptic curve cryptography;
Elliptic curves;
Registers;
73.
Impact of test compression on power supply noise control
机译:
测试压缩对电源噪声控制的影响
作者:
Tengteng Zhang
;
Walker D.M.H.
会议名称:
《2015 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems》
|
2015年
关键词:
interference suppression;
power supplies to apparatus;
EDT;
PSN control algorithm;
compression constraints;
embedded deterministic test;
power supply noise control;
test compression;
Decision support systems;
Discrete Fourier transforms;
Fault tolerance;
Fault tolerant systems;
Nanotechnology;
Very large scale integration;
power supply noise;
test compaction/compression;
74.
Low-power LDPC decoder design exploiting memory error statistics
机译:
低功耗LDPC解码器设计利用内存错误统计
作者:
Junlin Chen
;
Lei Wang
会议名称:
《2015 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems》
|
2015年
关键词:
error statistics;
parity check codes;
LDPC decoder technique;
algorithmic error tolerance capability;
decoding performance;
error sensitivity;
low power LDPC decoder design;
memory bits;
memory error statistics;
memory locations;
memory power consumption;
scaled supply voltage;
voltage scaling;
Bit error rate;
Decoding;
Iterative decoding;
Memory management;
Power demand;
LDPC decoders;
error sensitivity;
low power design;
memory errors;
75.
Compacting output responses containing unknowns using an embedded processor
机译:
使用嵌入式处理器压实包含未知数未知的输出响应
作者:
Saleem Kamran
;
Muthyala Sreenivaas S.
;
Touba Nur A.
会议名称:
《2015 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems》
|
2015年
关键词:
embedded systems;
integrated circuit design;
software engineering;
system-on-chip;
MISR;
SoC designs;
arithmetic operations;
embedded processor;
low cost partial X-masking step;
mask data;
multiinput signature register;
signature analysis;
software-based test;
system-on-chip;
Clocks;
Decision support systems;
Discrete Fourier transforms;
Fault tolerance;
Fault tolerant systems;
Nanotechnology;
Very large scale integration;
76.
Chip-level anti-reverse engineering using transformable interconnects
机译:
使用可变形互连的芯片级防逆向工程
作者:
Shuai Chen
;
Junlin Chen
;
Forte Domenic
;
Jia Di
;
Tehranipoor Mark
;
Lei Wang
会议名称:
《2015 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems》
|
2015年
关键词:
integrated circuit interconnections;
integrated circuit packaging;
reverse engineering;
semiconductor industry;
chip package;
chip reverse engineering;
chip-level antireverse engineering;
electrical property;
gain access;
integrated circuit cloning;
low-cost delaying processing;
semiconductor industry;
transformable IC technology;
transformable interconnect;
Complexity theory;
Correlation;
Integrated circuit interconnections;
Logic gates;
Reverse engineering;
Timing;
77.
Accelerated microarchitectural Fault Injection-based reliability assessment
机译:
加速微体系结构故障注射可靠性评估
作者:
Kaliorakis Manolis
;
Tselonis Sotiris
;
Chatzidimitriou Athanasios
;
Gizopoulos Dimitris
会议名称:
《2015 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems》
|
2015年
关键词:
fault diagnosis;
performance evaluation;
reliability;
statistical analysis;
RTL fault injector;
accelerated microarchitectural fault injection;
performance evolution;
reliability assessment;
reliability estimation;
rendering;
statistical fault injection;
vulnerability measurement;
x86-64 out-of-order architecture;
Accuracy;
Benchmark testing;
Circuit faults;
Estimation;
Microarchitecture;
Registers;
Reliability;
early reliability evaluation;
microarchitectural simulators;
microprocessors;
statistical fault injection;
78.
SEU sensitivity and modeling using pico-second pulsed laser stimulation of a D Flip-Flop in 40 nm CMOS technology
机译:
SEU利用40nm CMOS技术的D触发器激光刺激的敏感性和建模
作者:
Champeix Clement
;
Borrel Nicolas
;
Dutertre Jean-Max
;
Robisson Bruno
;
Lisart Mathieu
;
Sarafianos Alexandre
会议名称:
《2015 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems》
|
2015年
关键词:
CMOS digital integrated circuits;
flip-flops;
logic gates;
radiation hardening (electronics);
sensitivity analysis;
CMOS technology;
D flip-flop;
SEU sensitivity;
complementary metal oxide semiconductor;
complex integrated circuit;
laser fault sensitivity mapping;
laser interaction;
laser pulse duration;
laser-sensitive area;
logic gate;
picosecond pulsed laser stimulation;
silicon interaction;
single event upset;
size 40 nm;
Flip-flops;
Integrated circuit modeling;
Junctions;
Latches;
Photoconductivity;
Semiconductor device modeling;
Transistors;
D Flip-Flop cell;
Electrical Modeling;
Hardware Security;
Laser Fault Injection;
Photoelectric Laser Stimulation;
Single Event Effects;
79.
Fault detection and repair of DSC arrays through memristor sensing
机译:
通过Memristor感应的DSC阵列故障检测和修复
作者:
Mathew J.
;
Yang Y.
;
Ottavi M.
;
Brown T.
;
Zampetti A.
;
Di Carlo A.
;
Jabir A.M.
;
Pradhan D.K.
会议名称:
《2015 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems》
|
2015年
关键词:
fault diagnosis;
memristors;
search problems;
solar cell arrays;
DSC arrays repair;
SPICE simulation;
fault detection;
fault tolerant design;
fault tolerant photovoltaic array;
green energy system;
high energy-conversion efficiency;
low-cost photovoltaic technology;
memristor sensing;
photovoltaic cells dye solar cell;
search algorithm;
Circuit faults;
Fault detection;
Fault tolerance;
Maintenance engineering;
Memristors;
Photovoltaic cells;
Sensors;
80.
Piecewise-functional broadside tests based on intersections of reachable states
机译:
基于可达状态交叉口的分段功能广域试验
作者:
Pomeranz Irith
会议名称:
《2015 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems》
|
2015年
关键词:
circuit testing;
delay fault overtesting;
functional clock cycle;
functional operation condition;
piecewise-functional broadside test;
power dissipation;
reachable state intersection;
Benchmark testing;
Circuit faults;
Computational modeling;
Delays;
Fault tolerance;
Fault tolerant systems;
Switches;
Broadside tests;
functional broadside tests;
switching activity;
transition faults;
81.
Influence of triple-well technology on laser fault injection and laser sensor efficiency
机译:
三井技术对激光故障注射和激光传感器效率的影响
作者:
Borrel N.
;
Champeix C.
;
Kussener E.
;
Rahajandraibe W.
;
Lisart M.
;
Sarafianos A.
;
Dutertre J.-M.
会议名称:
《2015 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems》
|
2015年
关键词:
CMOS integrated circuits;
electric sensing devices;
radiation hardening (electronics);
BBICS;
CMOS technology;
SEE;
body-biasing adjustments;
bulk built-in current sensors;
countermeasures sensors;
deep-Nwell implant;
dual-well technology;
integrated circuit sensitivity;
laser sensor efficiency;
laser-induced fault injections;
registers;
single event effects;
single-event response;
size 40 nm;
size 90 nm;
soft error rate;
triple well technology;
CMOS integrated circuits;
Circuit faults;
MOS devices;
Monitoring;
Photoconductivity;
Transient analysis;
Transistors;
Laser;
body biasing;
countermeasure;
fault injection;
triple-well;
82.
Towards reliability and performance-aware Wireless Network-on-Chip design
机译:
迈向可靠性和性能感知无线网络上的芯片设计
作者:
Agyeman Michael Opoku
;
Kin-Fai Tong
;
Mak Terrence
会议名称:
《2015 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems》
|
2015年
关键词:
conductors (electric);
dielectric materials;
error statistics;
integrated circuit interconnections;
integrated circuit reliability;
network-on-chip;
SoC;
WiNoC reliability;
communication fabric;
dielectric material;
efficiency 10.7 percent;
efficiency 13.8 percent;
efficiency 21.4 percent;
error rate;
frequency 60 GHz;
hybrid wired-wireless network-on-chip;
performance-aware wireless network-on-chip design;
surface wave signal;
system-on-chip;
thin metal conductor;
transducer;
wireless interconnect fabric;
wireline channel;
Bit error rate;
Fabrics;
Reliability;
Surface waves;
Transceivers;
Transducers;
Wireless communication;
83.
Evaluating the impact of spike and flicker noise in phase change memories
机译:
评估穗和闪烁噪声在相变回忆中的影响
作者:
Junsangsri Salin
;
Lombardi Fabrizio
;
Jie Han
会议名称:
《2015 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems》
|
2015年
关键词:
circuit simulation;
flicker noise;
phase change memories;
HSPICE simulation;
array-level;
binary PCM memories;
cell-level;
flicker noise impact evaluation;
memory cell;
phase change memories;
simulation-based analysis;
spike noise impact evaluation;
state switching phenomena;
1f noise;
Arrays;
MOSFET;
Phase change materials;
Resistance;
Switches;
Flicker noise;
Frequency;
Phase Change Memory (PCM);
Resistance;
Spike noise;
84.
Reducing the performance overhead of resilient CMPs with substitutable resources
机译:
利用可替代资源降低弹性CMP的性能开销
作者:
Malek A.
;
Tzilis S.
;
Khan D.A.
;
Sourdis I.
;
Smaragdos G.
;
Strydis C.
会议名称:
《2015 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems》
|
2015年
关键词:
clocks;
integrated circuit interconnections;
microprocessor chips;
multiprocessing systems;
adaptive 4-core CMP design;
baseline processor;
chip multiprocessors;
execution cycles constant;
performance overhead reduction;
processor configuration;
reconfigurable interconnect pipelining;
resilient CMP;
scaling down operating frequency;
slower clock;
substitutable pipeline stages;
substitutable resources;
Benchmark testing;
Clocks;
Delays;
Pipeline processing;
Pipelines;
Program processors;
Registers;
85.
Single Event Upsets and Hot Pixels in digital imagers
机译:
数字成像仪中的单个事件upsets和热像素
作者:
Chapman Glenn H.
;
Thomas Rahul
;
Thomas Rohan
;
Coelho Silva Meneses Klinsmann J.
;
Yang Tommy Q.
;
Koren Israel
;
Koren Zahava
会议名称:
《2015 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems》
|
2015年
关键词:
image sensors;
radiation hardening (electronics);
SEU rate;
dark image;
digital imagers;
hot pixels;
occurrence rate;
permanent fault rates;
single event upsets;
Cameras;
Digital images;
ISO;
ISO Standards;
Lighting;
Single event upsets;
APS;
CCD;
ISO;
SEU;
active pixel sensor;
hot pixel;
imager defects;
86.
Security analysis of logic encryption against the most effective side-channel attack: DPA
机译:
对最有效的侧通道攻击逻辑加密的安全分析:DPA
作者:
Yasin Muhammad
;
Mazumdar Bodhisatwa
;
Ali Sk Subidh
;
Sinanoglu Ozgur
会议名称:
《2015 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems》
|
2015年
关键词:
integrated logic circuits;
private key cryptography;
DPA-resistance;
IC encryption;
IC lock;
IP piracy;
differential power analysis attack;
key bits;
logic encryption security analysis;
random-logic encryption technique;
reverse engineering attacks;
secret key;
side-channel attack;
strong logic encryption technique;
Algorithm design and analysis;
Benchmark testing;
Encryption;
IP networks;
Integrated circuits;
Reverse engineering;
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