Path delay calculation device, path delay calculation program and path delay calculation method

摘要

To calculate an appropriate delay amount according to a timing constraint to be verified and an input signal of a logic element and a voltage level of a power supply voltage.SOLUTION: A path delay calculation device 1 comprises an element delay amount calculation unit. The element delay amount calculation unit includes a reference delay amount calculation unit for calculating a reference delay amount. The reference delay amount indicates a delay amount to be a reference of a target element that is a logic element included in a path. The element delay amount calculation unit comprises a power supply voltage extraction unit which extracts, from logic circuit information, a target power supply voltage which is a voltage for driving the target element, and extracts, from the logic circuit information, a previous stage power supply voltage which is a voltage for driving a previous stage element connected to the input terminal of the target element. The element delay amount calculation unit further includes a voltage correction coefficient determination unit. The voltage correction coefficient determination unit determines weather the delay amount of the path to be calculated is which of the maximum value and the minimum value. The voltage correction coefficient determination unit determines the voltage correction coefficient of the target element according to the comparison result of the previous stage power supply voltage and the target power supply voltage. The element delay amount calculation unit comprises a delay amount calculation unit that calculates the delay amount of the target element from the reference delay amount and the voltage correction coefficient.SELECTED DRAWING: Figure 4