首页> 外国专利> MRAM 30nm HIGHLY PHYSICAL ETCH RESISTIVE PHOTORESIST MASK TO DEFINE LARGE HEIGHT SUB 30NM VIA AND METAL HARD MASK FOR MRAM DEVICES

MRAM 30nm HIGHLY PHYSICAL ETCH RESISTIVE PHOTORESIST MASK TO DEFINE LARGE HEIGHT SUB 30NM VIA AND METAL HARD MASK FOR MRAM DEVICES

机译:MRAM 30NM高度物理蚀刻电阻式光刻胶掩模,用于为MRAM器件的通孔和金属硬掩模定义大高度亚30nm和金属硬掩模

摘要

A conductive via layer is deposited on the bottom electrode, patterned and trimmed to form sub 20 nm conductive vias on the bottom electrode. The conductive via is encapsulated with a first dielectric layer that is planarized to expose a top surface of the conductive via. The MTJ stack is deposited on encapsulated conductive vias, wherein the MTJ stack includes at least a pinned layer, a barrier layer and a free layer. A top electrode layer is deposited on the MTJ stack, patterned and trimmed to form a sub-30 nm hard mask. The MTJ stack is etched using a hard mask to form the MTJ device, over etched into the encapsulation layer but not into the bottom electrode, where the metal re-deposition material is encapsulated at the bottom of the MTJ device. It is formed on the sidewall of the layer, but not on the sidewall of the barrier layer of the MTJ device.
机译:导电通孔层沉积在底部电极上,图案化并修剪以在底部电极上形成亚20nm导电通孔。 导电通孔被封装,该第一介电层被平坦化以暴露导电通孔的顶表面。 MTJ叠层沉积在封装的导电通孔上,其中MTJ叠层包括至少钉扎层,阻挡层和自由层。 顶部电极层沉积在MTJ堆叠上,图案化并修剪以形成亚30 nm硬掩模。 使用硬掩模进行蚀刻MTJ堆叠以形成MTJ器件,通过蚀刻到封装层中但不在底部电极中蚀刻,其中金属再沉积材料封装在MTJ器件的底部。 它形成在层的侧壁上,但不在MTJ器件的阻挡层的侧壁上。

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