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POWER MANAGEMENT INTEGRATED CIRCUIT FOR MONITORING OUTPUT VOLTAGE, MEMORY MODULE INCLUDING POWER MANAGEMENT INTEGRATED CIRCUIT AND MEMORY DEVICE, AND OPERATING METHOD OF MEMORY MODULE
POWER MANAGEMENT INTEGRATED CIRCUIT FOR MONITORING OUTPUT VOLTAGE, MEMORY MODULE INCLUDING POWER MANAGEMENT INTEGRATED CIRCUIT AND MEMORY DEVICE, AND OPERATING METHOD OF MEMORY MODULE
A power management integrated circuit (PMIC) includes a voltage regulator, a monitoring circuit, and a count register. The voltage regulator is configured to generate an output voltage. The monitoring circuit is configured to receive a feedback voltage of the output voltage, and to determine at each of periodic intervals whether the feedback voltage is outside a threshold voltage range. The count register is configured to store a count value indicative of a number of times the feedback voltage is determined by the monitoring circuit to be outside the threshold voltage range.
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