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SEMICONDUCTOR MEMORY DEVICE FOR IMPROVING SIGNAL INTEGRITY ISSUE IN CENTER PAD TYPE OF STACKED CHIP STRUCTURE
SEMICONDUCTOR MEMORY DEVICE FOR IMPROVING SIGNAL INTEGRITY ISSUE IN CENTER PAD TYPE OF STACKED CHIP STRUCTURE
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机译:用于提高中央焊盘型堆叠结构中信号完整性问题的半导体存储器件
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摘要
Disclosed is a semiconductor memory device having a center pad type and capable of improving a signal integrity issue due to a stub effect of a redistribution layer connected to a center pad in a stacked chip structure operated in a multi-rank structure. A semiconductor memory device according to the present invention includes a first memory die having a first termination resistor for on-die termination and a second memory die having a second termination resistor for on-die termination and formed on the first memory die . The first and second memory dies have a center pad type and operate in a multi-rank structure. Termination of the first and second memory dies may be performed in an other termination type. That is, the second termination resistor is coupled to the second memory die when the first memory die is accessed, and the first termination resistor is coupled to the first memory die when the second memory die is accessed.
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