首页> 外国专利> SEMICONDUCTOR MEMORY DEVICE FOR IMPROVING SIGNAL INTEGRITY ISSUE IN CENTER PAD TYPE OF STACKED CHIP STRUCTURE

SEMICONDUCTOR MEMORY DEVICE FOR IMPROVING SIGNAL INTEGRITY ISSUE IN CENTER PAD TYPE OF STACKED CHIP STRUCTURE

机译:用于提高中央焊盘型堆叠结构中信号完整性问题的半导体存储器件

摘要

Disclosed is a semiconductor memory device having a center pad type and capable of improving a signal integrity issue due to a stub effect of a redistribution layer connected to a center pad in a stacked chip structure operated in a multi-rank structure. A semiconductor memory device according to the present invention includes a first memory die having a first termination resistor for on-die termination and a second memory die having a second termination resistor for on-die termination and formed on the first memory die . The first and second memory dies have a center pad type and operate in a multi-rank structure. Termination of the first and second memory dies may be performed in an other termination type. That is, the second termination resistor is coupled to the second memory die when the first memory die is accessed, and the first termination resistor is coupled to the first memory die when the second memory die is accessed.
机译:公开了一种具有中心焊盘类型的半导体存储器件,并且能够由于在多级结构中操作的堆叠芯片结构中连接到中心焊盘的重新分配层的短截分布层的短截线效应而能够提高信号完整性问题。根据本发明的半导体存储器件包括第一存储器管芯,其具有用于导通终止的第一终端电阻器,并且第二存储器管芯具有用于导通终端的第二终端电阻,并且形成在第一存储器管芯上。第一和第二存储器管芯具有中心焊盘类型并且在多级结构中操作。可以以其他终端类型执行第一和第二存储器管芯的终止。也就是说,当访问第一存储器管芯时,第二终端电阻器耦合到第二存储器芯片,并且当访问第二存储器管芯时,第一终止电阻器耦合到第一存储器芯片。

著录项

  • 公开/公告号KR102275812B1

    专利类型

  • 公开/公告日2021-07-14

    原文格式PDF

  • 申请/专利权人 삼성전자주식회사;

    申请/专利号KR20150125715

  • 发明设计人 김경범;문현종;이희석;차승용;

    申请日2015-09-04

  • 分类号G11C5/04;G11C11/4093;G11C5/06;G11C7/10;

  • 国家 KR

  • 入库时间 2022-08-24 20:07:16

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