System for resolving memory access conflicts among processors and minimizing processor waiting times for access to memory by comparing waiting times and breaking ties by an arbitrary priority ranking

摘要

A system for resolving conflicts among processors for access to a memory to which the processors are connected by a first bus includes a number of logic circuits, one for each processor. Each logic circuit receives a number of inputs to determine when access to the memory can be had for its processor. These inputs include a memory use request made by the processor, a memory availability signal communicated to all the logic circuits over a second bus, and the longest available processor waiting time, communicated to all the logic circuits over a third bus. Each logic circuit compares the longest processor waiting time with its own processor's waiting time, and will connect its processor to the memory when the following conditions coincide: a request for the memory by its processor, a memory availability signal, and one of the following: a longer waiting time for its processor than for any other processor or its processor's waiting time being equal to the longest other waiting time and its processor having a higher rank, different ranks being arbitrarily assigned to the processors to break ties. This system minimizes maximum processor waiting time because no processor can reach the memory twice before another that has in the meantime requested it reaches it once.