首页> 外国专利> Circuit processing input signals into control signals - has monitoring device which delays final evaluation of output signals until undefined state dies down

Circuit processing input signals into control signals - has monitoring device which delays final evaluation of output signals until undefined state dies down

机译:将输入信号处理成控制信号的电路-具有监视装置,该装置延迟对输出信号的最终评估,直到不确定状态消失

摘要

The input signals arrived at undefined times at an interface between digital, independently operating functional units. Decision elements are connected to one of the input lines, responding to a level change in an input signal. A monitoring device (WS) also consisting of decision elements is allocated to the decision elements (SF). It delivers a warning signal (W) when one of the decision elements is undefinable controlled by an input signal which delays the final evaluation of the output signal of the undefinable controlled decision element until the undefined operational state dies down.
机译:输入信号以不确定的时间到达独立运行的数字功能单元之间的接口。决策元件连接到输入线之一,以响应输入信号中的电平变化。同样由决策元素组成的监视设备(WS)被分配给决策元素(SF)。当决策元素之一无法由输入信号控制时,它会发出警告信号(W),该信号会延迟对不确定的受控决策元素的输出信号的最终评估,直到不确定的工作状态消失为止。

著录项

  • 公开/公告号DE2834128A1

    专利类型

  • 公开/公告日1980-02-14

    原文格式PDF

  • 申请/专利权人 SIEMENS AG;

    申请/专利号DE19782834128

  • 发明设计人 WOLFGERHARD;

    申请日1978-08-03

  • 分类号H04L7/10;H03K5/13;

  • 国家 DE

  • 入库时间 2022-08-22 17:36:11

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