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Test circuit for time demultiplexer - compares test words in memory with same test words passed via demultiplexer to address memory
Test circuit for time demultiplexer - compares test words in memory with same test words passed via demultiplexer to address memory
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机译:时间解复用器的测试电路-将内存中的测试字与通过解复用器传递到地址存储器的相同测试字进行比较
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摘要
The test circuit has the n outputs (al-an) of the address-controlled time demultiplexer (DEM) connected to the n inputs of a test memory (D, Sp). The demultiplexer's address input receives test words which are also stored in the memory's storage cells (Z1 etc). The test words are their own addresses in the memory. Initially the demultiplexer's signal input receives a 'l' signal. The test word stored in the memory at the selected cell is compared with the test word applied to the demultiplexer as address. If the two words are not the same an error signal is released indicating that the demultiplexer is not distributing its signals correctly.
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