首页> 外国专利> Filter with low output impedance - uses CCD filter between series amplifier networks controlled by CMOS clock

Filter with low output impedance - uses CCD filter between series amplifier networks controlled by CMOS clock

机译:低输出阻抗滤波器-在CMOS时钟控制的串联放大器网络之间使用CCD滤波器

摘要

The filter uses the transfer of electric charge in a semiconductor formed on a multi-layered ceramic substrate. A charge coupled device (CCD) charge transfer filter is formed on an N-type silicon substrate with two grids. The device has positive balancing coefficients. Two bipolar amplifiers are included, each of which is associated with a network of resistors and capacitors formed in thin layers on the substrate. The amplifiers together with their associated networks each comprise second order analogue filters in series with the input and the output of the CCD filter. A CMOS clock controls the CCD filter. In an alternative arrangement the substrate may carry two such filters, the resistors and capacitors being formed on the same substrate. The clock however is formed on a separate substrate electrically connected to the first.
机译:该滤波器利用在多层陶瓷基板上形成的半导体中的电荷转移。在具有两个栅极的N型硅基板上形成电荷耦合器件(CCD)电荷转移滤波器。该设备具有正平衡系数。包括两个双极放大器,每个双极放大器与在基板上薄层中形成的电阻器和电容器网络相关。放大器及其相关网络均包括与CCD滤波器的输入和输出串联的二阶模拟滤波器。 CMOS时钟控制CCD滤波器。在可替换的布置中,衬底可以携带两个这样的滤波器,电阻器和电容器形成在同一衬底上。然而,时钟形成在电连接至第一基板的单独基板上。

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