首页> 外国专利> Master slave distributed clock arrangement - uses master clock emitting time check pulse daily or weekly to slave clocks running independently

Master slave distributed clock arrangement - uses master clock emitting time check pulse daily or weekly to slave clocks running independently

机译:主从时钟分布式时钟安排-使用主时钟每天或每周向独立运行的从时钟使用时间检查脉冲

摘要

The system includes a number of individual clocks (1) each of which has a circuit (42) for resetting them to the correct time in response to a received electrical signal. A high precision clock mounted centrally (42) emits daily or weekly pulses in order to correct the time displayed by the other clocks. The signal is emitted via the mains supply network, preferable between the phase and neutral lines of the supply. A ferrite ring (15) has a number of windings formed on it. The master clock provides pulses as input to one of these windings, while another secondary winding is connected via filtering circuits to the mains. The filter prevents the return of mains current, while allowing the transmission of the correcting time pulse. The pulse is detected by 'slave' clocks, and used to correct their displayed time.
机译:该系统包括多个单独的时钟(1),每个单独的时钟具有电路(42),用于响应于接收到的电信号将它们重置为正确的时间。居中安装的高精度时钟(42)每天或每周发出一次脉冲,以校正其他时钟显示的时间。信号通过市电电源网络发出,最好在电源的相线和中性线之间发出。铁氧体环(15)上形成有多个绕组。主时钟将脉冲作为输入提供给这些绕组之一,而另一个次级绕组则通过滤波电路连接至电源。该滤波器可防止市电电流回流,同时允许传输校正时间脉冲。脉冲由“从”时钟检测,并用于校正其显示时间。

著录项

  • 公开/公告号FR2494867A1

    专利类型

  • 公开/公告日1982-05-28

    原文格式PDF

  • 申请/专利权人 SONELEC;

    申请/专利号FR19800024901

  • 发明设计人 DIDIER SEVERI;

    申请日1980-11-24

  • 分类号G04C11/04;H04H1/00;

  • 国家 FR

  • 入库时间 2022-08-22 12:27:36

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