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Electronic pulse clock generator with adjustable time delay circuit for timing relays, particularly for a time delay circuit with remote adjustment
Electronic pulse clock generator with adjustable time delay circuit for timing relays, particularly for a time delay circuit with remote adjustment
This clock generator exhibits a comparison circuit which compares a voltage, rising across the timing capacitor, of a timing section, the non-pulsating reference potential of which can be adjusted at a time adjustment potentiometer, with a time-determining preset reference voltage, a switching device being switched in dependence on the result of the comparison. The first comparison circuit with the first switching device and the first timing section form a first timing circuit which is followed by a second timing circuit which exhibits a second timing section, a second comparison circuit and a second switching device. The output signal of the first switching device controls the second timing circuit and the output signal of the second switching device controls the first timing circuit. IMAGE
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