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A television camera, in which is above the flicker phenomenon occurring in the image formation device for coupling to load a interlacing of frames with a three phase of the clock register of the image
A television camera, in which is above the flicker phenomenon occurring in the image formation device for coupling to load a interlacing of frames with a three phase of the clock register of the image
Field-rate flicker is suppressed in a CCD imager having a three-phase operated image register provided interlacing by integrating odd-numbered fields with only the first clock phase high and even-numbered fields with only the second and third clock phases high. The flicker is suppressed by making the gate electrodes in the A register receiving the second and third clock phases of equal lengths, half that of the gate electrodes receiving the first clock phase.
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