Multi-stage binary counter equipped for test runs

摘要

Groups of counter stages (ZG1 to ZG4) are formed which are connected to one another, and from their own group output to their own group input, via logic elements (G6 to G21) in such a manner that, in a test mode, the groups successively run through all possible counting stage states so that, overall, relatively few counter pulses are needed for the complete test. IMAGE