首页> 外国专利> INPUT CIRCUIT FOR PROGRAMABLE LOGIC DEVICE AND PROGRAMABLE LOGIC CIRCUIT FOR BEING USED IN PROGRAMABLE LOGIC DEVICE AS WELL AS PROGRAMABLE LOGIC DEVICE

INPUT CIRCUIT FOR PROGRAMABLE LOGIC DEVICE AND PROGRAMABLE LOGIC CIRCUIT FOR BEING USED IN PROGRAMABLE LOGIC DEVICE AS WELL AS PROGRAMABLE LOGIC DEVICE

机译:用于可编程逻辑装置的输入电路和用于可编程逻辑装置以及可编程逻辑装置的可编程逻辑电路

摘要

PURPOSE: To efficiently use all inputs and input/output pins of a device by connecting one input terminal of a selecting circuit to an output terminal of the selecting circuit according to program information stored by the selecting circuit, when a programmable logic device is programmed. CONSTITUTION: When an input pin 78 is programmed so as to function as an input pin, a selecting circuit 82 connects a signal line 80 to a column driver 88. When the input pin 78 is so programmed as to generate a clock signal, the selecting circuit 82 ignores all signals appearing on the signal line 80. Instead, a buffer 84 supplies the clock signal of a clock signal line 80 to output logic macrocells(OLMC) 48, 50, 52 and 54. When the pin 78 is used as the input pin, the OLMCs 48, 50, 52 and 54 are programmed so as to ignore the signals appearing on a clock use line 88. Consequently, a programmable logic circuit can use an AND-OR array input better.
机译:目的:当对可编程逻辑器件进行编程时,通过根据选择电路存储的程序信息将选择电路的一个输入端子连接到选择电路的输出端子,以有效地使用设备的所有输入和输入/输出引脚。构成:当输入引脚78被编程为用作输入引脚时,选择电路82将信号线80连接至列驱动器88。当输入引脚78被编程为生成时钟信号时,选择电路82忽略出现在信号线80上的所有信号。取而代之的是,缓冲器84将时钟信号线80的时钟信号提供给输出逻辑宏单元(OLMC)48、50、52和54。在输入引脚上,对OLMC 48、50、52和54进行了编程,以忽略出现在时钟使用线88上的信号。因此,可编程逻辑电路可以更好地使用AND-OR阵列输入。

著录项

相似文献

  • 专利
  • 外文文献
  • 中文文献
获取专利

客服邮箱:kefu@zhangqiaokeyan.com

京公网安备:11010802029741号 ICP备案号:京ICP备15016152号-6 六维联合信息科技 (北京) 有限公司©版权所有
  • 客服微信

  • 服务号