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INPUT CIRCUIT FOR PROGRAMABLE LOGIC DEVICE AND PROGRAMABLE LOGIC CIRCUIT FOR BEING USED IN PROGRAMABLE LOGIC DEVICE AS WELL AS PROGRAMABLE LOGIC DEVICE
INPUT CIRCUIT FOR PROGRAMABLE LOGIC DEVICE AND PROGRAMABLE LOGIC CIRCUIT FOR BEING USED IN PROGRAMABLE LOGIC DEVICE AS WELL AS PROGRAMABLE LOGIC DEVICE
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机译:用于可编程逻辑装置的输入电路和用于可编程逻辑装置以及可编程逻辑装置的可编程逻辑电路
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摘要
PURPOSE: To efficiently use all inputs and input/output pins of a device by connecting one input terminal of a selecting circuit to an output terminal of the selecting circuit according to program information stored by the selecting circuit, when a programmable logic device is programmed. CONSTITUTION: When an input pin 78 is programmed so as to function as an input pin, a selecting circuit 82 connects a signal line 80 to a column driver 88. When the input pin 78 is so programmed as to generate a clock signal, the selecting circuit 82 ignores all signals appearing on the signal line 80. Instead, a buffer 84 supplies the clock signal of a clock signal line 80 to output logic macrocells(OLMC) 48, 50, 52 and 54. When the pin 78 is used as the input pin, the OLMCs 48, 50, 52 and 54 are programmed so as to ignore the signals appearing on a clock use line 88. Consequently, a programmable logic circuit can use an AND-OR array input better.
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