首页> 外国专利> cell convertitrice voltage - current, adjustable, carried out by one stage differential transistors, mos.in particular, to form synapses to networks neuroniche and combination of these cells to form the support of synapses of a core neur

cell convertitrice voltage - current, adjustable, carried out by one stage differential transistors, mos.in particular, to form synapses to networks neuroniche and combination of these cells to form the support of synapses of a core neur

机译:细胞转换电压-电流,可调节,由一级差分晶体管(尤其是mos)执行,以形成神经网络的突触,并结合这些细胞以形成核心神经突触的支持

摘要

A cell of MOS transistors for converting a voltage into a current for forming synapses of neural nets, in particular for converting the difference between an input voltage (VIN) and a voltage (VW) for weighting the synapse into a current, realized by means of a differential stage comprising a first transistor (M1) operating as a current generator, in which a first and a second branch in parallel end, which branches respectively comprise a second (M2) and a third (M3) push-pull connected transistor, to the gate regions of which the input voltage (VIN) and the voltage (VW) for weighting the synapse, and to which a fourth (M4) and a fifth (M5) transistor are respectively connected in series, in which the fourth (M4) and the fifth (M5) transistor are P-MOS transistors having their gate regions short-circuited and said fourth (M4) P-MOS transistor is connected as a diode, and in which the output current (IOUT) is drawn from the node (N) that connects said third (M3) and said fifth (M5) transistors inserted in series in said second branch of the circuit and a capacitor (c) is connected to the gate region of said third (M3) transistor to store the voltage (VW) for weighting the synapse applied to the circuit.
机译:MOS晶体管单元,用于将电压转换为电流以形成神经网络的突触,特别是用于将输入电压(VIN)和电压(VW)之间的差转换为用于加权突触的电流,该方法通过以下方式实现差分级,其包括用作电流发生器的第一晶体管(M1),其中并联端的第一和第二分支分别包括第二(M2)和第三(M3)推挽连接的晶体管,栅极区域,其输入电压(VIN)和用于加权突触的电压(VW),以及串联连接的第四(M4)和第五(M5)晶体管,其中第四(M4)第五(M5)晶体管是其栅极区域短路的P-MOS晶体管,并且所述第四(M4)P-MOS晶体管作为二极管连接,并且其中输出电流(IOUT)从节点( N)连接所述第三(M3)和所述第五(M5)版本在所述电路的所述第二分支中串联插入的电阻和电容器(c)连接至所述第三(M3)晶体管的栅极区域,以存储电压(VW)以加权施加至所述电路的突触。

著录项

相似文献

  • 专利
  • 外文文献
获取专利

客服邮箱:kefu@zhangqiaokeyan.com

京公网安备:11010802029741号 ICP备案号:京ICP备15016152号-6 六维联合信息科技 (北京) 有限公司©版权所有
  • 客服微信

  • 服务号